Do not write physical-only cells in the output verilog file#8256
Do not write physical-only cells in the output verilog file#8256openroad-ci wants to merge 1 commit intoThe-OpenROAD-Project:masterfrom
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…clude physical-only cells). - This makes STA not traverse physical-only cells. - In the output .v, there will be no physical-only cells. Signed-off-by: Jaehyun Kim <jhkim@precisioninno.com>
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clang-tidy review says "All clean, LGTM! 👍" |
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@maliberty any concerns is changes power or other metrics? Write verilog already has an option to remove cells from the netlist. |
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@jhkim-pii please run a small design with and without this change and compare for the concerns above. @gadfort I don't think we'll have Liberty files for physical only cells like tapcell or fillers so I don't expect it to affect power (still good to check). |
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@maliberty I would imagine it would effect leakage power only. If you mock the liberty file to ensure there is enough leakage power that it would be noticable. An alternative would be to add the ability to selectively preserve the old behavior. |
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@gadfort do you have an actual case where it matters or is this theoretical? |
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I checked the fix in ORFS. Preserving the old behavior looks good. Do you have any recommendation for the UI? |
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@maliberty decap filler cells are physical only, but have leakage power |
That is a fair point. @jhkim-pii perhaps we should leave sta seeing these cells in dbNetwork and just change ORFS to use -remove_cells to drop them from Verilog. |
Hmm.. I don't know how to do this. How can we check the |
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We know the classes of cells we want to exclude (fill, tap). Those cells are specified in variables that we can use. |
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Got it. This is an alternative ORFS solution (it does not dump physical-only cells by |



Fixes #8254