ALU

The 3.3 ALU Primitive is a 2-input arithmetic logic unit that can realize the functions of ADD, SUB, ADDSUB, CUP, CDN, CUPCDN, GE, and NE. It has an input signal I3 to select between different operations: ADD/SUB/ADDSUB, with I3=1 selecting an adder, I3=0 selecting a subtractor; or CUP/CDN/CUPCDN, with I3=1 selecting a counter that increments (CUP) or remains unchanged and can be set to increment (CUPCDN), and I3=0 selecting a counter that decrements (CDN).

This device is supported in Apicula.

Ports

Port	Size	Direction
CIN	1	input
COUT	1	output
I0	1	input
I1	1	input
I3	1	input
SUM	1	output

Parameters

Parameter	Default Value
ALU_MODE	0 (0b00000000000000000000000000000000)

Verilog Instantiation

ALU #(
    .ALU_MODE(ALU_MODE)
) alu_inst (
    .CIN(CIN),
    .COUT(COUT),
    .I0(I0),
    .I1(I1),
    .I3(I3),
    .SUM(SUM)
);