DHCE

The Gowin DHCE primitive can be used to dynamically turn on/off the HCLK signal, and it has three ports: CLKIN (clock input), CEN (clock enable, active-low), and CLKOUT (clock output). The primitive can be instantiated directly in a design using either Verilog or VHDL.

This device is not yet supported in Apicula

Ports

Port	Size	Direction
CEN	1	input
CLKIN	1	input
CLKOUT	1	output

Verilog Instantiation

DHCE dhce_inst (
    .CEN(CEN),
    .CLKIN(CLKIN),
    .CLKOUT(CLKOUT)
);