DL

The DL primitive is a commonly used latch with an active-high control signal G. It has three ports: D for input data, Q for output data, and G for control signal input. The initial value of the DL primitive is 1'b0 by default, and can be set to any other value using the INIT parameter in its instantiation.

This device is not yet supported in Apicula

Ports

Port	Size	Direction
D	1	input
G	1	input
Q	1	output

Parameters

Parameter	Default Value
INIT	0 (0b0)

Verilog Instantiation

DL #(
    .INIT(INIT)
) dl_inst (
    .D(D),
    .G(G),
    .Q(Q)
);