Mchp zephyr dspic release v3.0 #2

MuhammedZamroodh · 2025-08-05T18:08:32Z

Release V3.3

Highlights: - Added support for xc-dsc toolchain: CMake scripts, linker files - Arch bring-up for dsPIC (Curiosity board): thread creation, early boot, swap - CMake: Improved path detection, removed debug messages, static lib fixes - Interrupt vector table (IVT) initialization and macro definition - MISRA compliance fixes - Various bug fixes, stylistic cleanup, and compliance-related updates Changes: * cmake: Add xc-dsc toolchain support and linker script * arch: dspic: Rename isr_table_vt.ld to vector_table.ld * camke: Fix path detection for build dependencies * cmake: Resolve include path issues * cmake: Remove debug messages * arch: dspic: Add thread creation and init logic * arch: Resolve arch_swap implicit declaration warning * arch: Add vector tables and common ISR wrapper * cmake: Enable compiling assembly files * cmake: Fix static library linking * arch: Support IVT table placement and macros * cmake: Skip init priorities check for xc-dsc * toolchain: Remove stdlib usage (use picolibc instead) * arch: Remove use of unimplemented functions * arch: Early boot sequence implementation * arch: Task swap and main thread entry logic Signed-off-by: Udhayanandhan Jayakumar <[email protected]>

Add copyright and license headers to Kconfigs and other files Signed-off-by: Muhammed Zamroodh <[email protected]>

The custom const sections are placed in FLASH and being copied from .dinit to Flash again, We can avoid that by placing the section in RAM to begin with Signed-off-by: Muhammed Zamroodh <[email protected]>

Highlights: - Context switching and thread creation - Timer driver and system timer integartion - UART driver and LOG integration - Fixes for linking and toolchain support - Power management (idle state) - Interrupt support in OS - Twister and flash support - General fixes Signed-off-by: Muhammed Zamroodh <[email protected]>

harishagari · 2025-08-18T06:52:35Z

arch/dspic/include/kernel_arch_swap.h

+static inline __attribute__((always_inline)) void z_dspic_save_context(void)
+{
+	/*Adjust stack for co-operative swap*/
+	__asm__ volatile(


Instead of inline assembly isn't it good to use pure assembly code?

I mean can we have this functions as part of .S file?

We could do that, initially this was part of core zephyr hooks.
But can now do that as we separated it from the hooks, will take this as a task for next release (As we might need to test the build and functionalities after)

harishagari · 2025-08-20T07:26:04Z

arch/dspic/core/fatal.c

+	address = PCTRAP;
+	LOG_ERR("ERROR !!! Exception reason = %s, address = 0x%x\n", "Illegal Instruction",
+		address);
+	INTCON1bits.BADOPERR = 0;


Any reason for using different approaches in different fucntions for clearing the trap (using mask or writing to 0 to the bitfield)?

This came from different developers, we will unify the approaches.
failed to catch this in the review

harishagari · 2025-08-20T09:30:27Z

drivers/serial/uart_dspic.c

+	ANSELB = 0x033FUL;
+
+	/* Assign U1TX to RP23 and U1RX to RP24*/
+	_RP23R = 9;


why are pins are configured as part of driver? Shouldn't it be part of dts ? There is no guarantee that these pins will be available in variants of dsPIC33AK(Low pin count devices)?

We are developing a pin control driver and with that the configurations for the pin mux will come from the dts files.
You can expect this in the next release

harishagari · 2025-08-21T04:48:31Z

drivers/serial/uart_dspic.c

+	volatile uint32_t *UxTXREG = (void *)(cfg->base + OFFSET_TXREG);
+
+	/* Wait until there is space in the TX FIFO */
+	while ((bool)(void *)((*UxSTA) & BIT_TXBF)) {


isn't this enough -> "while (*UxSTA & BIT_TXBF)" , why do we need the multiple typecasting here?

This is to satisfy the MISRA compliance.

harishagari · 2025-08-21T06:38:16Z

include/zephyr/arch/dspic/linker.ld

this linker file is specific to dsPIC33AK128MC106? should we have this file as part of folder dsPIC33A? we do have other variants of dsPICs(dsPIC33E, dsPIC33C) as well , the linker scripts for those may vary

We have plans to to do that, this will be addressed with the support for the 2nd chip

harishagari · 2025-08-22T05:08:04Z

arch/dspic/core/irq_manage.c

+
+void arch_irq_enable(unsigned int irq)
+{
+	volatile uint32_t *int_enable_reg[] = {&IEC0, &IEC1, &IEC2, &IEC3, &IEC4,


these registers can differ between dsPIC33A , dsPIC33C and other dsPIC architectures. should we have specific folders for this , instead having this part of "dsPIC" folder?

Noted, will assess how to modify this and redesign.

harishagari · 2025-08-22T05:11:08Z

arch/dspic/core/reset0.S

+__start:
+    ;; Initialize stack pointer and limit
+    mov.l  #__SP_init, w15        ; Stack pointer (W15)
+    mov.l  #__SPLIM_init, w14     ; Stack limit (W14)


I see the comment still not addressed https://github.com/Zephyr4Microchip/zephyr/pull/1/files#r2200117916

We will add a hot fix for this. We missed to merge the commit.
Will push this as part of the v3 itself

dspic: Windows host fixes for west flash West flash tool was failing, modified flash tool script In windows build was failing with Path name with spaces, using modified cmake script. Signed-off-by: Adhil Xavier <[email protected]>

harishagari · 2025-09-02T04:34:57Z

arch/dspic/core/irq_manage.c

+
+int arch_irq_is_enabled(unsigned int irq)
+{
+	volatile uint32_t *int_enable_reg[] = {&IEC0, &IEC1, &IEC2, &IEC3, &IEC4,


dsPIC33AK128MC106 has IEC0 to IEC8
dsPIC33AK512MPS512 has IEC0 to IEC11 , shouldn't we handle this in a proper way?

Noted, will assess how to modify this and redesign.

harishagari · 2025-09-02T05:05:39Z

arch/dspic/include/kernel_arch_func.h

+	 * clear all the interrupts, set the interrupt flag status
+	 * registers to zero.
+	 */
+	IFS0 = 0x0;


dsPIC33AK128MC106 has IFS0 to IFS8
dsPIC33AK512MP512 has IFS0 to IFS11 , shouldn't we handle this in a proper way?

Noted, will assess how to modify this and redesign.

harishagari · 2025-09-02T05:16:50Z

drivers/serial/uart_dspic.c

+
+static int uart_dspic_init(const struct device *dev)
+{
+	LATB = 0x0040UL;


I don't think this is right to add the pin configuration code here, this can vary from device to devices having same architecture

Uart file name not following RFC: zephyrproject-rtos#92168

@harishagari : this change will come as part of pin control driver
@NhMchp : Noted, we will make the changes

harishagari · 2025-09-02T09:00:09Z

include/zephyr/arch/dspic/linker.ld

+
+/*
+** ============== Equates for SFR Addresses =============
+*/


Linker script varies from device to device , and these(SFR) addresses as well. Compiler/DFP provides linker scripts for each device. Dont we need an generic way to handle this?

This is in works, will be addressed with the support for the 2nd chip

Setting CXX compiler evironment variable to xc-dsc-gcc Toolchain path issues fixed. Signed-off-by: Adhil Xavier <[email protected]>

harishagari · 2025-09-24T05:36:14Z

@MuhammedZamroodh Please resolve the conflicts

harishagari

Please resolve the conflicts and sync the branch with develop branch(if not already done)

Udhayanandhan-Jayakumar and others added 4 commits July 10, 2025 16:03

arch, soc: add copyright and license headers

968f316

Add copyright and license headers to Kconfigs and other files Signed-off-by: Muhammed Zamroodh <[email protected]>

linker: place const custom sections in RAM

b62dbcc

The custom const sections are placed in FLASH and being copied from .dinit to Flash again, We can avoid that by placing the section in RAM to begin with Signed-off-by: Muhammed Zamroodh <[email protected]>

MuhammedZamroodh force-pushed the mchp_zephyr_dspic_release_v3.0 branch from 3e081af to e120593 Compare August 11, 2025 06:09

harishagari requested review from NhMchp, harishagari and pradeepbudagutta August 18, 2025 04:19

harishagari reviewed Aug 18, 2025

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harishagari reviewed Aug 20, 2025

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harishagari reviewed Aug 21, 2025

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harishagari reviewed Aug 22, 2025

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harishagari reviewed Sep 2, 2025

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cmake: cmake toolchain path fixes are added

c0b81b1

Setting CXX compiler evironment variable to xc-dsc-gcc Toolchain path issues fixed. Signed-off-by: Adhil Xavier <[email protected]>

harishagari approved these changes Sep 23, 2025

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harishagari self-requested a review September 24, 2025 05:36

harishagari requested changes Sep 24, 2025

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harishagari self-requested a review September 26, 2025 03:28

harishagari approved these changes Oct 8, 2025

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NhMchp merged commit 38268f3 into dsPIC33A Oct 8, 2025
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Mchp zephyr dspic release v3.0 #2

Mchp zephyr dspic release v3.0 #2

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