add support for AD3532R/AD3532 DAC

[kseerp]

PR Description

These parts are unreleased but have BU approval to upstream the driver so it can be ready prior to RTS.

The AD3532R/AD3532 is a 16-channel, 16-bit voltage output DAC. These
devices use a dual-bank register architecture with base addresses at
0x1000 (bank 0) and 0x3000 (bank 1). Channels 0-7 are mapped to bank 0,
while channels 8-15 are mapped to bank 1.

Key Changes:

• Add ad3532r_set_dac_powerdown() to handle 4-register powerdown
  mapping (0x1020/0x1021 for channels 0-7, 0x3020/0x3021 for 8-15)
• Implement AD3532-specific powerdown modes: 1kΩ, 10kΩ, three-state
  (differs from AD3530/31's 1kΩ, 7.7kΩ, 32kΩ modes)
• Extend ad3530r_normal_op_mode() and ad3530r_setup() to configure
  dual-bank registers for reference control and output settings
• Add ad3532r_input_ch_reg() and ad3532r_trigger_sw_ldac_reg() for
  bank-aware register addressing
• Use dynamic channel allocation with chip-specific ext_info to
  handle different powerdown mode enums per variant.

PR Type

• Bug fix (a change that fixes an issue)
• New feature (a change that adds new functionality)
• Breaking change (a change that affects other repos or cause CIs to fail)

PR Checklist

• I have conducted a self-review of my own code changes
• I have compiled my changes, including the documentation
• I have tested the changes on the relevant hardware
• I have updated the documentation outside this repo accordingly
• I have provided links for the relevant upstream lore

[gastmaier]

Same as #3191, if you are upstreaming, please target branches in sync with upstream cycle (the mirror_ci branches), this helps to avoid using deprecated methods.

[kseerp]

v2:

• change target branch to mirror_ci/jic23/iio/testing
• replace magic numbers in ad3532r_set_dac_powerdown() with channel arithmetic instead of switch case