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1 change: 1 addition & 0 deletions doc/changelog.d/6775.fixed.md
Original file line number Diff line number Diff line change
@@ -0,0 +1 @@
Bug located in primitives circuit module
6 changes: 3 additions & 3 deletions src/ansys/aedt/core/modeler/circuits/primitives_circuit.py
Original file line number Diff line number Diff line change
Expand Up @@ -1387,7 +1387,7 @@ def refresh_all_ids(self):
o.schematic_id = int(name[1].split(":")[0])
objID = int(o.schematic_id)
else:
o.id = int(name[1])
o.id = name[1]
o.schematic_id = name[2]
objID = int(o.schematic_id)

Expand Down Expand Up @@ -1424,7 +1424,7 @@ def add_id_to_component(self, component_id, name=None):
o = CircuitComponent(self, tabname=self.tab_name)
o.name = name[0]
if len(name) > 2:
o.id = int(name[1])
o.id = name[1]
o.schematic_id = int(name[2])
objID = o.schematic_id
else:
Expand All @@ -1448,7 +1448,7 @@ def add_id_to_component(self, component_id, name=None):
o = CircuitComponent(self, tabname=self.tab_name)
o.name = name[0]
if len(name) > 2:
o.id = int(name[1])
o.id = name[1]
o.schematic_id = int(name[2])
objID = o.schematic_id
else:
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -225,7 +225,7 @@ def create_subcircuit(self, location=None, angle=None, name=None, nested_subcirc
name = match[0].split(";")
o.name = name[0]
o.schematic_id = int(name[2])
o.id = int(name[1])
o.id = name[1]
return o
self.refresh_all_ids()
for el in self.components:
Expand Down
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