feat(irq): add GIC Hypervisor Interface support

Makefile

@@ -96,7 +96,8 @@ endif
 
 ifeq ($(ARCH), x86_64)
   # Don't enable kvm for WSL/WSL2.
-  ACCEL ?= $(if $(findstring -microsoft, $(shell uname -r | tr '[:upper:]' '[:lower:]')),n,y)
+  # It seems to work fine on 5.15.146.1-microsoft-standard-WSL2
+  # ACCEL ?= $(if $(findstring -microsoft, $(shell uname -r | tr '[:upper:]' '[:lower:]')),n,y)
   PLATFORM_NAME ?= x86_64-qemu-q35
 else ifeq ($(ARCH), riscv64)
   ACCEL ?= n
@@ -162,6 +163,8 @@ ifeq ($(PLATFORM_NAME), aarch64-raspi4)
   include scripts/make/raspi4.mk
 else ifeq ($(PLATFORM_NAME), aarch64-bsta1000b)
   include scripts/make/bsta1000b-fada.mk
+else ifeq ($(PLATFORM_NAME), aarch64-rk3588j)
+  include scripts/make/rk3588.mk
 endif
 
 build: $(OUT_DIR) $(OUT_BIN)

api/axfeat/Cargo.toml

@@ -56,6 +56,9 @@ driver-ramdisk = ["axdriver?/ramdisk", "axfs?/use-ramdisk"]
 driver-ixgbe = ["axdriver?/ixgbe"]
 driver-bcm2835-sdhci = ["axdriver?/bcm2835-sdhci"]
 
+#Hypervisor support 
+hv = ["axhal/hv"]
+
 # Logging
 log-level-off = ["axlog/log-level-off"]
 log-level-error = ["axlog/log-level-error"]

doc/platform_rk3588.md

@@ -0,0 +1,9 @@
+# How to run ArceOS on rk3588
+
+1. Use Command `make ARCH=aarch64 PLATFORM=aarch64-rk3588j A=$(pwd)/examples/helloworld kernel` to build the kernel image `boot.img`.
+2. Download the [RKDevTool](https://download.t-firefly.com/product/Board/RK3588/Tool/Window/RKDevTool_Release_v3.31.zip). 
+    >This tool has only been tested on [Pji's](https://www.pji.net.cn/) Electronic Control Unit of RK3588. Other RK3588 development boards require independent testing.
+3. Set the path of `boot.img` in **boot** and connect the RK3588 board.
+4. Press the `Run` button to flash the image to the RK3588 board.
+
+![RKDevTool](./figures/RKDevTool3.3.png)

modules/axconfig/build.rs

@@ -23,7 +23,9 @@ fn resolve_config_path(platform: Option<&str>) -> Result<PathBuf> {
             config_dir.join(format!("{plat}.toml"))
         }
         Some(plat) => {
-            let path = PathBuf::from(&plat);
+            let plat_path = std::env::var("AX_PLATFORM_PATH").unwrap_or(plat.to_string());
+            let path = PathBuf::from(&plat_path);
+            println!("Using custom platform config file: {}", path.display());
             if path.is_absolute() {
                 path
             } else {

modules/axhal/Cargo.toml

@@ -18,6 +18,7 @@ irq = []
 tls = ["alloc"]
 rtc = ["x86_rtc", "riscv_goldfish", "arm_pl031"]
 default = []
+hv = ["paging", "cortex-a", "percpu/arm-el2", "page_table_entry/arm-el2", "arm_gicv2/el2", "dep:crate_interface"]
 
 [dependencies]
 log = "=0.4.21"
@@ -37,6 +38,7 @@ page_table_multiarch = { version = "0.4", optional = true }
 axlog = { workspace = true }
 axconfig = { workspace = true }
 axalloc = { workspace = true, optional = true }
+cortex-a = { version = "8.1.1", optional = true }
 
 [target.'cfg(target_arch = "x86_64")'.dependencies]
 x86 = "0.52"
@@ -53,7 +55,8 @@ riscv_goldfish = { version = "0.1", optional = true }
 [target.'cfg(target_arch = "aarch64")'.dependencies]
 aarch64-cpu = "9.4"
 tock-registers = "0.8"
-arm_gicv2 = "0.1"
+arm_gicv2 = { git = "https://github.com/arceos-hypervisor/arm_gicv2" }
+crate_interface = { version = "0.1.3", optional = true }
 arm_pl011 = "0.1"
 arm_pl031 = { version = "0.2", optional = true }
 dw_apb_uart = "0.1"

modules/axhal/build.rs

@@ -5,6 +5,7 @@ const BUILTIN_PLATFORMS: &[&str] = &[
     "aarch64-bsta1000b",
     "aarch64-qemu-virt",
     "aarch64-raspi4",
+    "aarch64-rk3588j",
     "riscv64-qemu-virt",
     "x86_64-pc-oslab",
     "x86_64-qemu-q35",
@@ -14,6 +15,7 @@ const BUILTIN_PLATFORM_FAMILIES: &[&str] = &[
     "aarch64-bsta1000b",
     "aarch64-qemu-virt",
     "aarch64-raspi",
+    "aarch64-rk3588j",
     "riscv64-qemu-virt",
     "x86-pc",
 ];

modules/axhal/src/arch/aarch64/mod.rs

@@ -3,6 +3,10 @@ pub(crate) mod trap;
 
 use core::arch::asm;
 
+#[cfg(feature = "hv")]
+use aarch64_cpu::registers::{TTBR0_EL2, VBAR_EL2};
+//Todo: remove this, when hv is enabled, `TTBR1_EL1` is not used.
+#[cfg_attr(feature = "hv", allow(unused_imports))]
 use aarch64_cpu::registers::{DAIF, TPIDR_EL0, TTBR0_EL1, TTBR1_EL1, VBAR_EL1};
 use memory_addr::{PhysAddr, VirtAddr};
 use tock_registers::interfaces::{Readable, Writeable};
@@ -47,8 +51,13 @@ pub fn halt() {
 /// Returns the physical address of the page table root.
 #[inline]
 pub fn read_page_table_root() -> PhysAddr {
+    #[cfg(not(feature = "hv"))]
     let root = TTBR1_EL1.get();
-    pa!(root as usize)
+
+    #[cfg(feature = "hv")]
+    let root = TTBR0_EL2.get();
+
+    PhysAddr::from(root as usize)
 }
 
 /// Reads the `TTBR0_EL1` register.
@@ -66,8 +75,17 @@ pub unsafe fn write_page_table_root(root_paddr: PhysAddr) {
     let old_root = read_page_table_root();
     trace!("set page table root: {:#x} => {:#x}", old_root, root_paddr);
     if old_root != root_paddr {
-        // kernel space page table use TTBR1 (0xffff_0000_0000_0000..0xffff_ffff_ffff_ffff)
-        TTBR1_EL1.set(root_paddr.as_usize() as _);
+        #[cfg(not(feature = "hv"))]
+        {
+            // kernel space page table use TTBR1 (0xffff_0000_0000_0000..0xffff_ffff_ffff_ffff)
+            TTBR1_EL1.set(root_paddr.as_usize() as _);
+        }
+
+        #[cfg(feature = "hv")]
+        {
+            // kernel space page table at EL2 use TTBR0_EL2 (0x0000_0000_0000_0000..0x0000_ffff_ffff_ffff)
+            TTBR0_EL2.set(root_paddr.as_usize() as _);
+        }
         flush_tlb(None);
     }
 }
@@ -90,10 +108,24 @@ pub unsafe fn write_page_table_root0(root_paddr: PhysAddr) {
 pub fn flush_tlb(vaddr: Option<VirtAddr>) {
     unsafe {
         if let Some(vaddr) = vaddr {
-            asm!("tlbi vaae1is, {}; dsb sy; isb", in(reg) vaddr.as_usize())
+            #[cfg(not(feature = "hv"))]
+            {
+                asm!("tlbi vaae1is, {}; dsb sy; isb", in(reg) vaddr.as_usize())
+            }
+            #[cfg(feature = "hv")]
+            {
+                asm!("tlbi vae2is, {}; dsb sy; isb", in(reg) vaddr.as_usize())
+            }
         } else {
             // flush the entire TLB
-            asm!("tlbi vmalle1; dsb sy; isb")
+            #[cfg(not(feature = "hv"))]
+            {
+                asm!("tlbi vmalle1; dsb sy; isb")
+            }
+            #[cfg(feature = "hv")]
+            {
+                asm!("tlbi alle2is; dsb sy; isb")
+            }
         }
     }
 }
@@ -106,8 +138,11 @@ pub fn flush_icache_all() {
 
 /// Sets the base address of the exception vector (writes `VBAR_EL1`).
 #[inline]
-pub fn set_exception_vector_base(vbar_el1: usize) {
-    VBAR_EL1.set(vbar_el1 as _);
+pub fn set_exception_vector_base(vbar: usize) {
+    #[cfg(not(feature = "hv"))]
+    VBAR_EL1.set(vbar as _);
+    #[cfg(feature = "hv")]
+    VBAR_EL2.set(vbar as _);
 }
 
 /// Flushes the data cache line (64 bytes) at the given virtual address

modules/axhal/src/irq.rs

@@ -7,6 +7,9 @@ use crate::trap::{register_trap_handler, IRQ};
 
 pub use crate::platform::irq::{register_handler, set_enable};
 
+#[cfg(target_arch = "aarch64")]
+pub use crate::platform::irq::{fetch_irq, GicInterface};
+
 /// The type if an IRQ handler.
 pub type IrqHandler = handler_table::Handler;
 
@@ -35,8 +38,13 @@ pub(crate) fn register_handler_common(irq_num: usize, handler: IrqHandler) -> bo
     false
 }
 
+/// Core IRQ handling routine, registered at `axhal::trap::IRQ`,
+/// which dispatches IRQs to registered handlers.
+///
+/// Note: this function is denoted as public here because it'll be called by the
+/// hypervisor for hypervisor reserved IRQ handling.
 #[register_trap_handler(IRQ)]
-fn handler_irq(irq_num: usize) -> bool {
+pub fn handler_irq(irq_num: usize) -> bool {
     let guard = kernel_guard::NoPreempt::new();
     dispatch_irq(irq_num);
     drop(guard); // rescheduling may occur when preemption is re-enabled.

modules/axhal/src/lib.rs

@@ -61,6 +61,16 @@ pub mod paging;
 pub mod console {
     pub use super::platform::console::*;
 
+    /// Writes a byte to the console.
+    pub fn console_putchar(c: u8) {
+        putchar(c)
+    }
+
+    /// Reads a byte from the console, or returns [`None`] if no input is available.
+    pub fn console_getchar() -> Option<u8> {
+        getchar()
+    }
+
     /// Write a slice of bytes to the console.
     pub fn write_bytes(bytes: &[u8]) {
         for c in bytes {