feat: add ARMv7-A support with page table structures and tests #31
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equation314
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Dec 6, 2025
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Currently, PagingHandler::alloc_frame is designed to support pages of only 4KB in size, but the L1 page table in ARMv7-A is 16KB.
It may require updating the page frame allocation interface, such as #16.
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aarkegz
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Dec 20, 2025
aarkegz
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Jan 16, 2026
aarkegz
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Jan 16, 2026
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…x extraction functions
Unifies the public API by re-exporting architecture-specific definitions, making them accessible to downstream users without direct module imports. Improves usability and reduces friction for multi-arch consumers.
…e table structures
… improve common flag logic
…nd GenericPTE implementations
…include documentation support
aarkegz
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Jan 19, 2026
aarkegz
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Jan 20, 2026
equation314
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Jan 21, 2026
| // Deallocate all L2 page tables (each is 4KB) | ||
| let table = self.get_table(self.root_paddr); | ||
| for entry in table { | ||
| if !entry.is_unused() && !entry.is_huge() { |
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It may cause double-free if another page table is created by copy_from. See the solution in PageTable64.
equation314
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Jan 21, 2026
| // TODO: tune threshold; employ a more advanced data structure | ||
| const SMALL_FLUSH_THRESHOLD: usize = 32; | ||
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| enum TlbFlusher<M: PagingMetaData> { |
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Move this common enum to lib.rs
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This module implements page table entries for ARMv7-A architecture using
the Short-descriptor format, which supports 2-level page tables: