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RISC‐V Memory Layout

neeluk7 edited this page Nov 13, 2023 · 1 revision

This document describes where Tyche fits into the RISC-V memory layout.

In the existing design, the firmware i.e. OpenSBI generally occupies the memory region starting from the address 0x80000000 in rv64. Linux is placed at the next 2 MB boundary i.e. 0x80200000.

Default memory layout (without Tyche)

 -------------------- -------------------------------------
| openSBI            | Linux                          .... |
 -------------------- ------------------------------------- 
0x80000000            0x80200000 

For Tyche, we follow the same approach as in FW_PAYLOAD type of firmware.

Background about FW_PAYLOAD: OpenSBI supports different types of firmware configurations which work differently at boot. They are FW_JUMP, FW_DYNAMIC, and FW_PAYLOAD. FW_PAYLOAD includes a payload's binary directly in the firmware's binary.

In a similar manner, Tyche's binary is included in the firmware. To make space for Tyche, we move Linux to the next 2 MB aligned memory address i.e. 0x80400000. We configure the FW_PAYLOAD_OFFSET option (which specifies the offset at which to link the payload viz. Linux - this offset was 2 MB before) to make this change. (Similarly, we also move the offset for the FDT address by 2 MB.)

Memory Layout with Tyche

 -------------------------- --------------------- ------------------------------------- 
| openSBI                  | Tyche               | Linux                          .... |
 -------------------------- --------------------- -------------------------------------
0x80000000                  0x80250000            0x80400000

References

[1] OpenSBI FW_PAYLOAD Documentation.

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