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Trusted Boot
We use Intel TXT to to setup a dynamic root of trust which proves that stage 2 is indeed running in root mode, was correctly loaded, and that the system was properly initialized prior to launch. The measurement is done during the transition from stage 1 to stage 2.
SMX is the instruction set extension that enables creation of the dynamic root of trust.
The extension consists of the GETSEC instruction, which can perform various functions depending on the value of register (i.e., it has multiple leaves).
Unfortunately, SMX is not available on KVM, se if we want a decent development environment we need to somewhat emulate it. For this purpose when testing on QEMU we deactivate the SMX extension (in CR4) so that GETSEC will cause an undefined opcode exception, which is caught by stage 1 and then emulated.
After the ACM execution resulting from GETSEC[SENTER] the processor will drop into the MLE entry point in 32 bits mode with paging disabled.
To switch back to long mode (i.e. 64 bits) we have to first load a 64 bits page table, set up the PAE bit in CR4, enable long mode in the EFER MSR and finaly enable pagging by setting the PG bit of CR4.
At this point we are in compatibility mode, what is left to do is to load a 64 bits GDT and ??? (reload code segment? Jump somewhere?).
See OSDev wiki and Intel manual for details.
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SMX: Safer Mode Extension -
TXT: Trusted Execution Technology -
ACM: Authentication Code Module