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build-IGC.yml
254 workflow run results
254 workflow run results

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Add a reg key to disable emulation for fp64 to fp16 conversion Build IGC #6178: Commit ec65813 pushed by VPG-SWE-Github
37m 39s master
master
37m 39s
[Autobackout][FunctionalRegression]Revert of change: af5f505f0cea959c… Build IGC #6177: Commit 63f63c1 pushed by VPG-SWE-Github
34m 48s master
master
34m 48s
Enable sinking of 2d block reads Build IGC #6176: Commit 4c0be51 pushed by VPG-SWE-Github
35m 19s master
master
35m 19s
Enable finer 2d block loads scheduling Build IGC #6175: Commit 77d6042 pushed by VPG-SWE-Github
35m 7s master
master
35m 7s
Add Lit tests for ScalarizeFunction pass Build IGC #6174: Commit af5f505 pushed by VPG-SWE-Github
35m 50s master
master
35m 50s
Make finer scheduling of 2d block loads safe Build IGC #6173: Commit 28c6f48 pushed by VPG-SWE-Github
51m 26s master
master
51m 26s
Conversion of IGC LITs for opaque pointer support, batch 24 Build IGC #6172: Commit dfd1382 pushed by VPG-SWE-Github
40m 41s master
master
40m 41s
Fix VC internal intrinsics build break Build IGC #6171: Commit e300482 pushed by VPG-SWE-Github
34m 17s master
master
34m 17s
Introduce an intrinsic for optimization fence in VC Build IGC #6170: Commit bc730c5 pushed by VPG-SWE-Github
2m 6s master
master
2m 6s
NFC. Minor refactor of autogen.py Build IGC #6169: Commit 13f3921 pushed by VPG-SWE-Github
34m 8s master
master
34m 8s
Do not emit Mov instructions from undefined Phi incoming edges. Build IGC #6168: Commit 449891d pushed by VPG-SWE-Github
43m 22s master
master
43m 22s
Match and fold whole region override chains in VC Build IGC #6167: Commit 11ce7b9 pushed by VPG-SWE-Github
34m 41s master
master
34m 41s
IGCVectorizer update Build IGC #6166: Commit e1b2c75 pushed by VPG-SWE-Github
35m 18s master
master
35m 18s
[LLVM16] Fixing compilation issues in AliasAnalysis and dllInterface… Build IGC #6165: Commit 1fe72b7 pushed by VPG-SWE-Github
35m 49s master
master
35m 49s
Improvement in removing noop stores in DSE Build IGC #6164: Commit a996d7f pushed by VPG-SWE-Github
35m 20s master
master
35m 20s
[LLVM16] Define VC intrinsics through MemoryEffects syntax Build IGC #6163: Commit d66a9e0 pushed by VPG-SWE-Github
34m 29s master
master
34m 29s
Prepare sync dispatch rays for BTD support Build IGC #6162: Commit 6e56d81 pushed by VPG-SWE-Github
34m 48s master
master
34m 48s
Handle software fence in depressurizer in VC Build IGC #6161: Commit 2758c36 pushed by VPG-SWE-Github
34m 11s master
master
34m 11s
Updated ScalarizerCodeGen lit tests Build IGC #6160: Commit c1e6957 pushed by VPG-SWE-Github
34m 48s master
master
34m 48s
Fix test requirement Build IGC #6159: Commit 3a7fcc4 pushed by VPG-SWE-Github
35m 15s master
master
35m 15s
Fix ray tracing PrimLeaf, InstLeaf address calculation Build IGC #6158: Commit 8f02039 pushed by VPG-SWE-Github
34m 59s master
master
34m 59s
Improve llvm interim mode Build IGC #6157: Commit b642ff8 pushed by VPG-SWE-Github
35m 20s master
master
35m 20s
Update vISA spec Build IGC #6156: Commit 1544985 pushed by VPG-SWE-Github
34m 32s master
master
34m 32s
Set vISA_autoLoadLocalID during overriding visaasm files Build IGC #6155: Commit fa65306 pushed by VPG-SWE-Github
1h 3m 15s master
master
1h 3m 15s
[Autobackout][FunctionalRegression]Revert of change: 5e0b327f9f15bafe… Build IGC #6154: Commit 6ecd10b pushed by VPG-SWE-Github
34m 36s master
master
34m 36s