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Set FastMathFlags by default #2480

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Merged
merged 2 commits into from
Oct 15, 2024
Merged

Set FastMathFlags by default #2480

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831d42b
Set FastMathFlags by default
whitneywhtsang Oct 12, 2024
f6eee81
address review comment
whitneywhtsang Oct 15, 2024
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1 change: 0 additions & 1 deletion test/TritonIntelGPU/schedule-load.mlir
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Original file line number Diff line number Diff line change
Expand Up @@ -148,7 +148,6 @@ module attributes {"triton_gpu.num-warps" = 8 : i32, "triton_gpu.threads-per-war
scf.yield %98, %106, %110, %114, %118, %122, %126, %130, %321, %322, %323, %324, %325, %326, %327, %328, %329, %330, %331, %332, %333, %334, %335, %336 : tensor<8x16xf32>, tensor<8x16xf32>, tensor<8x16xf32>, tensor<8x16xf32>, tensor<8x16xf32>, tensor<8x16xf32>, tensor<8x16xf32>, tensor<8x16xf32>, !tt.ptr<tensor<16x16xf16>>, !tt.ptr<tensor<16x16xf16>>, !tt.ptr<tensor<16x16xf16>>, !tt.ptr<tensor<16x16xf16>>, !tt.ptr<tensor<16x16xf16>>, !tt.ptr<tensor<16x16xf16>>, !tt.ptr<tensor<16x16xf16>>, !tt.ptr<tensor<16x16xf16>>, !tt.ptr<tensor<16x16xf16>>, !tt.ptr<tensor<16x16xf16>>, !tt.ptr<tensor<16x16xf16>>, !tt.ptr<tensor<16x16xf16>>, !tt.ptr<tensor<16x16xf16>>, !tt.ptr<tensor<16x16xf16>>, !tt.ptr<tensor<16x16xf16>>, !tt.ptr<tensor<16x16xf16>>
}
%cst_1 = arith.constant dense<1.000000e+00> : tensor<8x16xf32>
// CHECK-COUNT-8: arith.divf {{.*}} fastmath<fast>
%67 = arith.divf %62#1, %cst_1 : tensor<8x16xf32>
%68 = arith.divf %62#2, %cst_1 : tensor<8x16xf32>
%69 = arith.divf %62#3, %cst_1 : tensor<8x16xf32>
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1 change: 1 addition & 0 deletions third_party/intel/backend/compiler.py
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Expand Up @@ -261,6 +261,7 @@ def make_llir(src, metadata, options):
if os.getenv("TRITON_INTEL_REDUCE_TRANSPOSE", "0") != "1":
intel.passes.ttgpuir.add_allocate_shared_memory(pm)
intel.passes.ttgpuir.add_to_llvmir(pm)
intel.set_fast_math(mod)
passes.convert.add_arith_to_llvmir(pm)
passes.common.add_canonicalizer(pm)
passes.common.add_cse(pm)
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9 changes: 0 additions & 9 deletions third_party/intel/lib/TritonIntelGPUTransforms/ScheduleLoad.cpp
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Expand Up @@ -90,15 +90,6 @@ class ScheduleLoadPass
op->moveAfter(def);
}
});

// HoHo, add fastmath for all
// may do this after llvm ir according to user fmath flag
mod.walk([&](Operation *op) {
if (auto fmIf = dyn_cast<arith::ArithFastMathInterface>(op))
op->setAttr(
fmIf.getFastMathAttrName(),
arith::FastMathFlagsAttr::get(ctx, arith::FastMathFlags::fast));
});
}

private:
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12 changes: 12 additions & 0 deletions third_party/intel/triton_xpu.cc
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Expand Up @@ -215,6 +215,18 @@ void init_triton_intel(py::module &&m) {
context.loadAllAvailableDialects();
});

// May do this after llvm ir according to user fmath flag.
m.def("set_fast_math", [](mlir::ModuleOp mod) {
using namespace mlir;
MLIRContext *ctx = mod.getContext();
mod.walk([&](Operation *op) {
if (auto fmIf = dyn_cast<arith::ArithFastMathInterface>(op))
op->setAttr(
fmIf.getFastMathAttrName(),
arith::FastMathFlagsAttr::get(ctx, arith::FastMathFlags::fast));
});
});

m.def("set_spv_target_triple", [](llvm::Module *mod) {
std::string triple = "spir64-unknown-unknown";
std::string layout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:"
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