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[SYCL] Remove SYCL_USE_NATIVE_FP_ATOMICS macro #19962

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Merged
merged 2 commits into from
Sep 4, 2025
Merged

[SYCL] Remove SYCL_USE_NATIVE_FP_ATOMICS macro #19962

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5f04a5d
Removed sycl_use_native_fp_atomics macro
dyniols Sep 3, 2025
0a2b4a4
fix
dyniols Sep 3, 2025
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5 changes: 1 addition & 4 deletions clang/lib/Frontend/InitPreprocessor.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -1545,10 +1545,7 @@ static void InitializePredefinedMacros(const TargetInfo &TI,
// with TI set to the device TargetInfo.
const llvm::Triple &Triple = TI.getTriple();
const llvm::Triple::SubArchType SubArch = Triple.getSubArch();
if (Triple.isNVPTX() || Triple.isAMDGPU() ||
(Triple.isSPIR() && SubArch != llvm::Triple::SPIRSubArch_fpga) ||
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@steffenlarsen steffenlarsen Sep 4, 2025

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Makes me wonder if there is more llvm::Triple::SPIRSubArch_fpga-specific behavior in the frontend/driver that we can get rid of.

Triple.isNativeCPU())
Builder.defineMacro("SYCL_USE_NATIVE_FP_ATOMICS");

// Enable generation of USM address spaces for FPGA.
if (SubArch == llvm::Triple::SPIRSubArch_fpga) {
Builder.defineMacro("__ENABLE_USM_ADDR_SPACE__");
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17 changes: 0 additions & 17 deletions clang/test/Preprocessor/sycl-macro-target-specific.cpp
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Expand Up @@ -34,23 +34,6 @@
// CHECK-AMDGPU: #define __AMDGPU__
// CHECK-AMDGPU-NEG-NOT: #define __AMDGPU__

// RUN: %clang_cc1 %s -fsycl-is-device -triple spir64-unknown-unknown -E -dM \
// RUN: | FileCheck --check-prefix=CHECK-SYCL-FP-ATOMICS %s
// RUN: %clang_cc1 %s -fsycl-is-device -triple spir64_gen-unknown-unknown -E -dM \
// RUN: | FileCheck --check-prefix=CHECK-SYCL-FP-ATOMICS %s
// RUN: %clang_cc1 %s -fsycl-is-device -triple spir64_x86_64-unknown-unknown -E -dM \
// RUN: | FileCheck --check-prefix=CHECK-SYCL-FP-ATOMICS %s
// RUN: %clang_cc1 %s -fsycl-is-device -triple spir64_fpga-unknown-unknown -E -dM \
// RUN: | FileCheck --check-prefix=CHECK-SYCL-FP-ATOMICS-NEG %s
// RUN: %clang_cc1 %s -fsycl-is-device -triple nvptx64-nvidia-nvcl -E -dM \
// RUN: | FileCheck --check-prefix=CHECK-SYCL-FP-ATOMICS %s
// RUN: %clang_cc1 %s -fsycl-is-device -triple amdgcn-amdhsa-amdhsa -E -dM \
// RUN: | FileCheck --check-prefix=CHECK-SYCL-FP-ATOMICS %s
// RUN: %clang_cc1 %s -fsycl-is-device -triple native_cpu \
// RUN: -E -dM | FileCheck --check-prefix=CHECK-SYCL-FP-ATOMICS %s
// CHECK-SYCL-FP-ATOMICS: #define SYCL_USE_NATIVE_FP_ATOMICS
// CHECK-SYCL-FP-ATOMICS-NEG-NOT: #define SYCL_USE_NATIVE_FP_ATOMICS

// RUN: %clang_cc1 %s -fsycl-is-device -triple spir64_fpga-unknown-unknown -E -dM \
// RUN: | FileCheck --check-prefix=CHECK-USM-ADDR-SPACE %s
// RUN: %clang_cc1 %s -fsycl-is-device -triple spir64-unknown-unknown -E -dM \
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16 changes: 4 additions & 12 deletions sycl/include/sycl/atomic_ref.hpp
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Expand Up @@ -469,9 +469,7 @@ class atomic_ref_impl<T, SizeOfT, DefaultOrder, DefaultScope, AddressSpace,

T fetch_add(T operand, memory_order order = default_read_modify_write_order,
memory_scope scope = default_scope) const noexcept {
// TODO: Remove the "native atomics" macro check once implemented for all
// backends
#if defined(__SYCL_DEVICE_ONLY__) && defined(SYCL_USE_NATIVE_FP_ATOMICS)
#if defined(__SYCL_DEVICE_ONLY__)
return detail::spirv::AtomicFAdd(ptr, scope, order, operand);
#else
auto load_order = detail::getLoadOrder(order);
Expand All @@ -492,9 +490,7 @@ class atomic_ref_impl<T, SizeOfT, DefaultOrder, DefaultScope, AddressSpace,

T fetch_sub(T operand, memory_order order = default_read_modify_write_order,
memory_scope scope = default_scope) const noexcept {
// TODO: Remove the "native atomics" macro check once implemented for all
// backends
#if defined(__SYCL_DEVICE_ONLY__) && defined(SYCL_USE_NATIVE_FP_ATOMICS)
#if defined(__SYCL_DEVICE_ONLY__)
return detail::spirv::AtomicFAdd(ptr, scope, order, -operand);
#else
auto load_order = detail::getLoadOrder(order);
Expand All @@ -513,9 +509,7 @@ class atomic_ref_impl<T, SizeOfT, DefaultOrder, DefaultScope, AddressSpace,

T fetch_min(T operand, memory_order order = default_read_modify_write_order,
memory_scope scope = default_scope) const noexcept {
// TODO: Remove the "native atomics" macro check once implemented for all
// backends
#if defined(__SYCL_DEVICE_ONLY__) && defined(SYCL_USE_NATIVE_FP_ATOMICS)
#if defined(__SYCL_DEVICE_ONLY__)
return detail::spirv::AtomicMin(ptr, scope, order, operand);
#else
auto load_order = detail::getLoadOrder(order);
Expand All @@ -529,9 +523,7 @@ class atomic_ref_impl<T, SizeOfT, DefaultOrder, DefaultScope, AddressSpace,

T fetch_max(T operand, memory_order order = default_read_modify_write_order,
memory_scope scope = default_scope) const noexcept {
// TODO: Remove the "native atomics" macro check once implemented for all
// backends
#if defined(__SYCL_DEVICE_ONLY__) && defined(SYCL_USE_NATIVE_FP_ATOMICS)
#if defined(__SYCL_DEVICE_ONLY__)
return detail::spirv::AtomicMax(ptr, scope, order, operand);
#else
auto load_order = detail::getLoadOrder(order);
Expand Down