Skip to content

[RISCV] Add missing assembler test case for c.addi zero, 0. NFC #112291

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 1 commit into from
Oct 15, 2024
Merged

[RISCV] Add missing assembler test case for c.addi zero, 0. NFC #112291

Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
5 changes: 5 additions & 0 deletions llvm/test/MC/RISCV/rv32c-valid.s
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -147,6 +147,11 @@ c.sub a4, a5
# CHECK-ASM: encoding: [0x01,0x00]
# CHECK-NO-EXT: error: instruction requires the following: 'C' (Compressed Instructions) or 'Zca' (part of the C extension, excluding compressed floating point loads/stores){{$}}
c.nop
# CHECK-ASM: c.addi zero, 0
Copy link
Member

@dtcxzyw dtcxzyw Oct 15, 2024

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

The spec says "C.ADDI is only valid when rd≠x0 and imm≠0".

Copy link
Collaborator Author

@topperc topperc Oct 15, 2024 •
edited
Loading

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

I know, but this syntax is supported by binutils. We have internal tests from our hardware validation team that uses this syntax.

The isa-manual used to say "C.NOP is encoded as c.addi x0, 0 and so expands to addi x0, x0, 0. Breakpoint Instruction." but it was changed 6 years ago. riscv/riscv-isa-manual#248

Copy link
Member

@dtcxzyw dtcxzyw Oct 15, 2024

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

I know, but this syntax is supported by binutils.

Make sense to me.

# CHECK-OBJ: c.nop
# CHECK-ASM: encoding: [0x01,0x00]
# CHECK-NO-EXT: error: instruction requires the following: 'C' (Compressed Instructions) or 'Zca' (part of the C extension, excluding compressed floating point loads/stores){{$}}
c.addi x0, 0
# CHECK-ASM-AND-OBJ: c.ebreak
# CHECK-ASM: encoding: [0x02,0x90]
# CHECK-NO-EXT: error: instruction requires the following: 'C' (Compressed Instructions) or 'Zca' (part of the C extension, excluding compressed floating point loads/stores){{$}}
Expand Down
Loading