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or disjoint (or disjoint (x, c0), c1)
-->
or disjont x, or (c0, c1)
Alive2: https://alive2.llvm.org/ce/z/3wPth5

@llvmbot llvmbot added the llvm:SelectionDAG SelectionDAGISel as well label Nov 29, 2024
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llvmbot commented Nov 29, 2024

@llvm/pr-subscribers-backend-aarch64

@llvm/pr-subscribers-llvm-selectiondag

Author: fengfeng (fengfeng09)

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or disjoint (or disjoint (x, c0), c1)
-->
or disjont x, or (c0, c1)
Alive2: https://alive2.llvm.org/ce/z/3wPth5


Full diff: https://github.com/llvm/llvm-project/pull/118045.diff

1 Files Affected:

  • (modified) llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (+4-1)
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 521829675ae7c3..f56930f08f68ef 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -1220,8 +1220,11 @@ SDValue DAGCombiner::reassociateOpsCommutative(unsigned Opc, const SDLoc &DL,
 
     if (DAG.isConstantIntBuildVectorOrConstantInt(N1)) {
       // Reassociate: (op (op x, c1), c2) -> (op x, (op c1, c2))
-      if (SDValue OpNode = DAG.FoldConstantArithmetic(Opc, DL, VT, {N01, N1}))
+      if (SDValue OpNode = DAG.FoldConstantArithmetic(Opc, DL, VT, {N01, N1})) {
+        NewFlags.setDisjoint(Flags.hasDisjoint() &&
+                             N0->getFlags().hasDisjoint());
         return DAG.getNode(Opc, DL, VT, N00, OpNode, NewFlags);
+      }
       return SDValue();
     }
     if (TLI.isReassocProfitable(DAG, N0, N1)) {

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Can you add some tests to demonstrate that this patch improves the codegen?

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Can you add some tests to demonstrate that this patch improves the codegen?

Ok.

dtcxzyw added a commit to dtcxzyw/llvm-codegen-benchmark that referenced this pull request Nov 29, 2024
@fengfeng09 fengfeng09 force-pushed the apply-disjoint-flag-if-possible branch from 9a21e38 to 7b3f0d1 Compare December 2, 2024 08:16
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Can you add some tests to demonstrate that this patch improves the codegen?

Updated. A test case is appended.

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LGTM.

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@dtcxzyw Thanks, could you help me merge this PR? I have no write access to this repo.

@@ -0,0 +1,15 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=aarch64-none-eabi -verify-machineinstrs %s -start-before=aarch64-isel -o - | FileCheck %s
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Why does this need -start-before=aarch64-isel? (Or -verify-machineinstrs for that matter)

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@fengfeng09 fengfeng09 Dec 2, 2024

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Cleared. That is not really needed.

or disjoint (or disjoint (x, c0), c1)
-->
or disjont x, or (c0, c1)
Alive2: https://alive2.llvm.org/ce/z/3wPth5

Signed-off-by: feng.feng <[email protected]>
@fengfeng09 fengfeng09 force-pushed the apply-disjoint-flag-if-possible branch from 7b3f0d1 to c3c7152 Compare December 2, 2024 10:04
@dtcxzyw dtcxzyw merged commit 7907292 into llvm:main Dec 3, 2024
8 checks passed
@fengfeng09 fengfeng09 deleted the apply-disjoint-flag-if-possible branch December 3, 2024 02:02
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