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[DAG] Apply Disjoint flag. #118045
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[DAG] Apply Disjoint flag. #118045
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@llvm/pr-subscribers-backend-aarch64 @llvm/pr-subscribers-llvm-selectiondag Author: fengfeng (fengfeng09) Changesor disjoint (or disjoint (x, c0), c1) Full diff: https://github.com/llvm/llvm-project/pull/118045.diff 1 Files Affected:
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 521829675ae7c3..f56930f08f68ef 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -1220,8 +1220,11 @@ SDValue DAGCombiner::reassociateOpsCommutative(unsigned Opc, const SDLoc &DL,
if (DAG.isConstantIntBuildVectorOrConstantInt(N1)) {
// Reassociate: (op (op x, c1), c2) -> (op x, (op c1, c2))
- if (SDValue OpNode = DAG.FoldConstantArithmetic(Opc, DL, VT, {N01, N1}))
+ if (SDValue OpNode = DAG.FoldConstantArithmetic(Opc, DL, VT, {N01, N1})) {
+ NewFlags.setDisjoint(Flags.hasDisjoint() &&
+ N0->getFlags().hasDisjoint());
return DAG.getNode(Opc, DL, VT, N00, OpNode, NewFlags);
+ }
return SDValue();
}
if (TLI.isReassocProfitable(DAG, N0, N1)) {
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dtcxzyw
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Can you add some tests to demonstrate that this patch improves the codegen?
Ok. |
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Updated. A test case is appended. |
dtcxzyw
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LGTM.
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@dtcxzyw Thanks, could you help me merge this PR? I have no write access to this repo. |
| @@ -0,0 +1,15 @@ | |||
| ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py | |||
| ; RUN: llc -mtriple=aarch64-none-eabi -verify-machineinstrs %s -start-before=aarch64-isel -o - | FileCheck %s | |||
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Why does this need -start-before=aarch64-isel? (Or -verify-machineinstrs for that matter)
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Cleared. That is not really needed.
or disjoint (or disjoint (x, c0), c1) --> or disjont x, or (c0, c1) Alive2: https://alive2.llvm.org/ce/z/3wPth5 Signed-off-by: feng.feng <[email protected]>
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or disjoint (or disjoint (x, c0), c1)
-->
or disjont x, or (c0, c1)
Alive2: https://alive2.llvm.org/ce/z/3wPth5