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[AMDGPU] frame index elimination hit assertion for scavenged nonreg #130287

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Merged
PankajDwivedi-25 merged 8 commits into from
Mar 17, 2025
Merged

[AMDGPU] frame index elimination hit assertion for scavenged nonreg #130287

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f596226
[WIP][AMDGPU] frame index elimination hit assertion for scavenged nonreg
PankajDwivedi-25 Mar 7, 2025
a628294
fall back to default handling if scavenger couldn't find valid reg
PankajDwivedi-25 Mar 7, 2025
bd60c1f
address review
PankajDwivedi-25 Mar 7, 2025
fb7cb89
added mir test
PankajDwivedi-25 Mar 10, 2025
9eac68f
Update failing test
PankajDwivedi-25 Mar 12, 2025
c69df65
merge failing test to common file
PankajDwivedi-25 Mar 13, 2025
6141f53
fix: fold the offset into FIOp if scavenger couldn't find free sgpr
PankajDwivedi-25 Mar 13, 2025
0866a23
address reviews
PankajDwivedi-25 Mar 13, 2025
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2 changes: 2 additions & 0 deletions llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -2799,6 +2799,8 @@ bool SIRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator MI,
TmpReg = RS->scavengeRegisterBackwards(AMDGPU::SReg_32_XM0RegClass,
MI, /*RestoreAfter=*/false, 0,
/*AllowSpill=*/false);
if (!TmpReg)
break;
DstReg = TmpReg;
}

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