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[HVX] Support lowering of setuo, seto. #140765

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[HVX] Support lowering of setuo, seto. #140765

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88b77a4
[HVX] Support lowering of setuo,seto.
kaushik-quicinc May 20, 2025
a087e11
Add setcc:uno, uo checks for f16
kaushik-quicinc May 22, 2025
ca8ed96
Use -mcpu=hexagonv79 instead of -mhvx79
kaushik-quicinc May 22, 2025
e046dd8
Use mattr=hvx79
kaushik-quicinc May 23, 2025
42e57ae
Fix typo. hvx79->hvxv79
kaushik-quicinc May 23, 2025
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4 changes: 4 additions & 0 deletions llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -349,6 +349,8 @@ HexagonTargetLowering::initializeHVXLowering() {
setCondCodeAction(ISD::SETULE, MVT::v64f16, Expand);
setCondCodeAction(ISD::SETUGE, MVT::v64f16, Expand);
setCondCodeAction(ISD::SETULT, MVT::v64f16, Expand);
setCondCodeAction(ISD::SETUO, MVT::v64f16, Expand);
setCondCodeAction(ISD::SETO, MVT::v64f16, Expand);

setCondCodeAction(ISD::SETNE, MVT::v32f32, Expand);
setCondCodeAction(ISD::SETLE, MVT::v32f32, Expand);
Expand All @@ -362,6 +364,8 @@ HexagonTargetLowering::initializeHVXLowering() {
setCondCodeAction(ISD::SETULE, MVT::v32f32, Expand);
setCondCodeAction(ISD::SETUGE, MVT::v32f32, Expand);
setCondCodeAction(ISD::SETULT, MVT::v32f32, Expand);
setCondCodeAction(ISD::SETUO, MVT::v32f32, Expand);
setCondCodeAction(ISD::SETO, MVT::v32f32, Expand);

// Boolean vectors.

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20 changes: 20 additions & 0 deletions llvm/test/MC/Hexagon/inst_setcc_uno_uo.ll
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@@ -0,0 +1,20 @@
;; RUN: llc -mv79 -mhvx %s -o - | FileCheck %s
source_filename = "isnan.c"
target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048"
target triple = "hexagon"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite, inaccessiblemem: readwrite)
define dso_local void @foo(ptr noundef readonly captures(none) %a, ptr noundef writeonly captures(none) %isnan_a) local_unnamed_addr #0 {
entry:
%arrayidx = getelementptr inbounds nuw float, ptr %a, i32 0
%0 = load <32 x float>, ptr %arrayidx, align 4
%.ripple.vectorized = fcmp uno <32 x float> %0, zeroinitializer
%arrayidx1 = getelementptr inbounds nuw i8, ptr %isnan_a, i32 0
%storedv.ripple.LS.instance = zext <32 x i1> %.ripple.vectorized to <32 x i8>
store <32 x i8> %storedv.ripple.LS.instance, ptr %arrayidx1, align 1
ret void
}

;; CHECK: vcmp.eq
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Are there any other stable outputs from this test that could be verified beyond vcmp.eq? For example, is there a polarity/direction of the comparison?

Also: MVT::v64f16 and MVT::v32f32 types seem to be supported, but does that mean other ones cannot be supported? If so, should we have new tests to verify more types than the ones that are used in foo above?

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SETO and SETUO should be only for floats. I don't think other types would come into play?

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(Added a check for f16.)

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Ok -- I'm not really experienced w/the compiler so forgive questions that appear out of left field.


attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite, inaccessiblemem: readwrite) "frame-pointer"="all" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="hexagonv79" "target-features"="+hmx,+hvx-length128b,+hvxv79,+v79,-long-calls" }