[HVX] Support lowering of setuo, seto.

[kaushik-quicinc]

The provided regression, Hexagon/inst_setcc_uno_uo.ll, fails prior to this patch.

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[llvmbot]

@llvm/pr-subscribers-mc

@llvm/pr-subscribers-backend-hexagon

Author: None (kaushik-quicinc)

Changes

The provided regression, Hexagon/inst_setcc_uno_uo.ll, fails prior to this patch.

---

Full diff: https://github.com/llvm/llvm-project/pull/140765.diff

2 Files Affected:

• (modified) llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp (+4)
• (added) llvm/test/MC/Hexagon/inst_setcc_uno_uo.ll (+20)

diff --git a/llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp b/llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
index fbbcacf0d713e..af3682ab38fa1 100644
--- a/llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
@@ -349,6 +349,8 @@ HexagonTargetLowering::initializeHVXLowering() {
   setCondCodeAction(ISD::SETULE, MVT::v64f16, Expand);
   setCondCodeAction(ISD::SETUGE, MVT::v64f16, Expand);
   setCondCodeAction(ISD::SETULT, MVT::v64f16, Expand);
+  setCondCodeAction(ISD::SETUO, MVT::v64f16, Expand);
+  setCondCodeAction(ISD::SETO, MVT::v64f16, Expand);
 
   setCondCodeAction(ISD::SETNE,  MVT::v32f32, Expand);
   setCondCodeAction(ISD::SETLE,  MVT::v32f32, Expand);
@@ -362,6 +364,8 @@ HexagonTargetLowering::initializeHVXLowering() {
   setCondCodeAction(ISD::SETULE, MVT::v32f32, Expand);
   setCondCodeAction(ISD::SETUGE, MVT::v32f32, Expand);
   setCondCodeAction(ISD::SETULT, MVT::v32f32, Expand);
+  setCondCodeAction(ISD::SETUO, MVT::v32f32, Expand);
+  setCondCodeAction(ISD::SETO, MVT::v32f32, Expand);
 
   // Boolean vectors.
 
diff --git a/llvm/test/MC/Hexagon/inst_setcc_uno_uo.ll b/llvm/test/MC/Hexagon/inst_setcc_uno_uo.ll
new file mode 100644
index 0000000000000..fa94f60b088c8
--- /dev/null
+++ b/llvm/test/MC/Hexagon/inst_setcc_uno_uo.ll
@@ -0,0 +1,20 @@
+;; RUN: llc -mv79 -mhvx %s -o - | FileCheck %s
+source_filename = "isnan.c"
+target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048"
+target triple = "hexagon"
+
+; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite, inaccessiblemem: readwrite)
+define dso_local void @foo(ptr noundef readonly captures(none) %a, ptr noundef writeonly captures(none) %isnan_a) local_unnamed_addr #0 {
+entry:
+  %arrayidx = getelementptr inbounds nuw float, ptr %a, i32 0
+  %0 = load <32 x float>, ptr %arrayidx, align 4
+  %.ripple.vectorized = fcmp uno <32 x float> %0, zeroinitializer
+  %arrayidx1 = getelementptr inbounds nuw i8, ptr %isnan_a, i32 0
+  %storedv.ripple.LS.instance = zext <32 x i1> %.ripple.vectorized to <32 x i8>
+  store <32 x i8> %storedv.ripple.LS.instance, ptr %arrayidx1, align 1
+  ret void
+}
+
+;; CHECK: vcmp.eq
+
+attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite, inaccessiblemem: readwrite) "frame-pointer"="all" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="hexagonv79" "target-features"="+hmx,+hvx-length128b,+hvxv79,+v79,-long-calls" }

[androm3da]

Are there any other stable outputs from this test that could be verified beyond vcmp.eq? For example, is there a polarity/direction of the comparison?

Also: MVT::v64f16 and MVT::v32f32 types seem to be supported, but does that mean other ones cannot be supported? If so, should we have new tests to verify more types than the ones that are used in foo above?

[kaushik-quicinc]

SETO and SETUO should be only for floats. I don't think other types would come into play?

[kaushik-quicinc]

(Added a check for f16.)

[androm3da]

Ok -- I'm not really experienced w/the compiler so forgive questions that appear out of left field.

[androm3da]

This test seems to expose an issue with v68-and-later (with HVX 64 byte mode). Not sure if it's on the baseline or introduced by your change, though.

./bin/llc --mtriple=hexagon --mcpu=hexagonv68 --mattr=+hvxv68,+hvx-length64b < ../llvm-project/llvm/test/MC/Hexagon/inst_setcc_uno_uo.ll > hvx64.s
llc: /local/mnt/workspace/upstream/llvm-project/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp:649: void llvm::DAGTypeLegalizer::ReplaceValueWith(SDValue, SDValue): Assertion `From.getNode() != To.getNode() && "Potential legalization loop!"' failed.
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace.

[kaushik-quicinc]

This test seems to expose an issue with v68-and-later (with HVX 64 byte mode). Not sure if it's on the baseline or introduced by your change, though.

Yes, the issue with the type legalizer is on the baseline too.

[kaushik-quicinc]

Duplicate of #158740.