[BOLT] [PowerPC] Port

[kostasalv]

Scope

This patch represents an initial portion of the ongoing work to port [BOLT] for [PowerPC] architecture.
Additional changes will follow to complete the port.

What does this patch do?

This pull request ports the [BOLT] createPushRegisters method to [PowerPC] target. That helps [BOLT] generate
[PowerPC] instructions to save registers on the stack.

Motivation

Port [BOLT] for [PowerPC] architecture.

Testing

• Built with 'ninja'
• Ran 'ninja check-lit' (all tests pass)
• Ran clang-format, no changes required

[github-actions]

✅ With the latest revision this PR passed the C/C++ code formatter.

[maksfb]

That's exciting to see BOLT getting PowerPC support!

Could you share more details about the project? Were you able to see real gains or is this still WIP?

[kostasalv]

Thank you for the feedback!
This is an initial contribution towards PowerPC support, and the work is still in progress. I plan to follow up with additional changes to complete the port. I don't have performance data available yet, but I plan to collect and share results as the implementation progresses.

[kostasalv]

Hi @maksfb, I did git push force recently. I noticed the [BOLT] label disappeared. Could it be re-applied manually? Thanks!

[llvmbot]

@llvm/pr-subscribers-bolt

Author: Kostas (kostasalv)

Changes

Scope

This patch represents an initial portion of the ongoing work to port [BOLT] for [PowerPC] architecture.
Additional changes will follow to complete the port.

What does this patch do?

This pull request ports the [BOLT] createPushRegisters method to [PowerPC] target. That helps [BOLT] generate
[PowerPC] instructions to save registers on the stack.

Motivation

Port [BOLT] for [PowerPC] architecture.

Testing

• Built with 'ninja'
• Ran 'ninja check-lit' (all tests pass)
• Ran clang-format, no changes required

---

Full diff: https://github.com/llvm/llvm-project/pull/140894.diff

6 Files Affected:

• (modified) bolt/CMakeLists.txt (+1-1)
• (modified) bolt/include/bolt/Core/MCPlusBuilder.h (+5)
• (modified) bolt/lib/Rewrite/RewriteInstance.cpp (+5)
• (modified) bolt/lib/Target/CMakeLists.txt (+3-1)
• (added) bolt/lib/Target/PowerPC/CMakeLists.txt (+29)
• (added) bolt/lib/Target/PowerPC/PPCMCPlusBuilder.cpp (+54)

diff --git a/bolt/CMakeLists.txt b/bolt/CMakeLists.txt
index 52c796518ac05..c18216d760808 100644
--- a/bolt/CMakeLists.txt
+++ b/bolt/CMakeLists.txt
@@ -58,7 +58,7 @@ endif() # standalone
 
 # Determine default set of targets to build -- the intersection of
 # those BOLT supports and those LLVM is targeting.
-set(BOLT_TARGETS_TO_BUILD_all "AArch64;X86;RISCV")
+set(BOLT_TARGETS_TO_BUILD_all "AArch64;X86;RISCV;PowerPC")
 set(BOLT_TARGETS_TO_BUILD_default)
 foreach (tgt ${BOLT_TARGETS_TO_BUILD_all})
   if (tgt IN_LIST LLVM_TARGETS_TO_BUILD)
diff --git a/bolt/include/bolt/Core/MCPlusBuilder.h b/bolt/include/bolt/Core/MCPlusBuilder.h
index 132d58f3f9f79..fa043a49bb87e 100644
--- a/bolt/include/bolt/Core/MCPlusBuilder.h
+++ b/bolt/include/bolt/Core/MCPlusBuilder.h
@@ -2293,6 +2293,11 @@ MCPlusBuilder *createRISCVMCPlusBuilder(const MCInstrAnalysis *,
                                         const MCRegisterInfo *,
                                         const MCSubtargetInfo *);
 
+MCPlusBuilder *createPowerPCMCPlusBuilder(const MCInstrAnalysis *,
+                                          const MCInstrInfo *,
+                                          const MCRegisterInfo *,
+                                          const MCSubtargetInfo *);
+
 } // namespace bolt
 } // namespace llvm
 
diff --git a/bolt/lib/Rewrite/RewriteInstance.cpp b/bolt/lib/Rewrite/RewriteInstance.cpp
index ad062ea3622d1..dbd9ecbaf1c66 100644
--- a/bolt/lib/Rewrite/RewriteInstance.cpp
+++ b/bolt/lib/Rewrite/RewriteInstance.cpp
@@ -304,6 +304,11 @@ MCPlusBuilder *createMCPlusBuilder(const Triple::ArchType Arch,
     return createRISCVMCPlusBuilder(Analysis, Info, RegInfo, STI);
 #endif
 
+#ifdef POWERPC_AVAILABLE
+  if (Arch == Triple::ppc64 || Arch == Triple::ppc64le)
+    return createPowerPCMCPlusBuilder(Analysis, Info, RegInfo, STI);
+#endif
+
   llvm_unreachable("architecture unsupported by MCPlusBuilder");
 }
 
diff --git a/bolt/lib/Target/CMakeLists.txt b/bolt/lib/Target/CMakeLists.txt
index eae8ebdddbf3f..38d423ac9483c 100644
--- a/bolt/lib/Target/CMakeLists.txt
+++ b/bolt/lib/Target/CMakeLists.txt
@@ -1,3 +1,5 @@
 foreach (tgt ${BOLT_TARGETS_TO_BUILD})
   add_subdirectory(${tgt})
-endforeach()
+  string(TOUPPER ${tgt} TGT_UPPER)
+  add_definitions(-D${TGT_UPPER}_AVAILABLE)
+endforeach()
\ No newline at end of file
diff --git a/bolt/lib/Target/PowerPC/CMakeLists.txt b/bolt/lib/Target/PowerPC/CMakeLists.txt
new file mode 100644
index 0000000000000..c1d2a054396d7
--- /dev/null
+++ b/bolt/lib/Target/PowerPC/CMakeLists.txt
@@ -0,0 +1,29 @@
+add_llvm_library(LLVMBOLTTargetPowerPC
+    PPCMCPlusBuilder.cpp
+)
+
+target_include_directories(LLVMBOLTTargetPowerPC PRIVATE
+    ${LLVM_BINARY_DIR}/include
+    ${LLVM_SOURCE_DIR}/include
+)
+
+file(MAKE_DIRECTORY "${LLVM_BINARY_DIR}/include/llvm/Target/PowerPC")
+
+foreach(incfile IN ITEMS
+    PPCGenInstrInfo.inc
+    PPCGenRegisterInfo.inc
+)
+    add_custom_command(
+        OUTPUT "${LLVM_BINARY_DIR}/include/llvm/Target/PowerPC/${incfile}"
+        COMMAND ${CMAKE_COMMAND} -E copy_if_different
+            "${LLVM_BINARY_DIR}/lib/Target/PowerPC/${incfile}"
+            "${LLVM_BINARY_DIR}/include/llvm/Target/PowerPC/${incfile}"
+        DEPENDS "${LLVM_BINARY_DIR}/lib/Target/PowerPC/${incfile}"
+        COMMENT "Copying ${incfile} to include directory"
+    )
+    add_custom_target(
+        "BoltCopy${incfile}" ALL
+        DEPENDS "${LLVM_BINARY_DIR}/include/llvm/Target/PowerPC/${incfile}"
+    )
+    add_dependencies(LLVMBOLTTargetPowerPC "BoltCopy${incfile}")
+endforeach()
\ No newline at end of file
diff --git a/bolt/lib/Target/PowerPC/PPCMCPlusBuilder.cpp b/bolt/lib/Target/PowerPC/PPCMCPlusBuilder.cpp
new file mode 100644
index 0000000000000..39d5ed2d3e36e
--- /dev/null
+++ b/bolt/lib/Target/PowerPC/PPCMCPlusBuilder.cpp
@@ -0,0 +1,54 @@
+//===- bolt/Target/PowerPC/PPCMCPlusBuilder.cpp -----------------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This file provides PowerPC-specific MCPlus builder.
+//
+//===----------------------------------------------------------------------===//
+
+#include "bolt/Core/MCPlusBuilder.h"
+#include "llvm/MC/MCInst.h"
+#include "llvm/MC/MCRegisterInfo.h"
+#define GET_INSTRINFO_ENUM
+#include "llvm/Target/PowerPC/PPCGenInstrInfo.inc"
+#define GET_REGINFO_ENUM
+#include "llvm/Target/PowerPC/PPCGenRegisterInfo.inc"
+
+namespace llvm {
+namespace bolt {
+
+class PPCMCPlusBuilder : public MCPlusBuilder {
+public:
+  using MCPlusBuilder::MCPlusBuilder;
+
+  // Create instructions to push two registers onto the stack
+  static void createPushRegisters(MCInst &Inst1, MCInst &Inst2, MCPhysReg Reg1,
+                                  MCPhysReg /*Reg2*/) {
+
+    Inst1.clear();
+    Inst1.setOpcode(PPC::STDU);
+    Inst1.addOperand(MCOperand::createReg(PPC::R1)); // destination (SP)
+    Inst1.addOperand(MCOperand::createReg(PPC::R1)); // base (SP)
+    Inst1.addOperand(MCOperand::createImm(-16));     // offset
+
+    Inst2.clear();
+    Inst2.setOpcode(PPC::STD);
+    Inst2.addOperand(MCOperand::createReg(Reg1));    // source register
+    Inst2.addOperand(MCOperand::createReg(PPC::R1)); // base (SP)
+    Inst2.addOperand(MCOperand::createImm(0));       // offset
+  }
+};
+
+MCPlusBuilder *createPowerPCMCPlusBuilder(const MCInstrAnalysis *Analysis,
+                                          const MCInstrInfo *Info,
+                                          const MCRegisterInfo *RegInfo,
+                                          const MCSubtargetInfo *STI) {
+  return new PPCMCPlusBuilder(Analysis, Info, RegInfo, STI);
+}
+
+} // namespace bolt
+} // namespace llvm

[kostasalv]

Gentle ping @aaupov @maksfb @rafaelauler @paschalis-mpeis @yota9 @ayermolo — when you have a moment, could you please take a look at this PR?
Thank you!

[yota9]

Hello @kostasalv ! Thank you for your work. But from my side I would say that maybe this port is too basic. I mean I would expect at least hello world test to be compiled and optimized to submit this PR. This is my IMHO, it's up to @maksfb to decide at the end, but maybe it would be possible to add couple of relocations & etc support to at least run couple very basic C (or even asm) tests with BOLT? thank you!

[maksfb]

Hi, @kostasalv,

The PR serves well as a skeleton for the backend. For a minimum implementation, I agree with @yota9 that it's reasonable to expect it to be able to process a simple program such as "Hello world".

I suggest you add a simple symbolic disassembler for PowerPC similar to X86MCSymbolizer and include a couple of PowerPC-specific relocations in the implementation. If you have patches on top of this one, feel free to share so that we can start reviewing them.

Regarding the current PR, what was the reason for copying *.inc files for the new target and including them directly rather than via PPCMCTargetDesc.h?

[kostasalv]

Hi @yota9 and @maksfb ,

Thank you very much for your guidance and for the review comments.
I agree that supporting at least a "Hello world" test case, including compilation and optimisation, is a sensible goal for this initial PR. I will work on extending the implementation to cover this.

I also plan to add a basic symbolic disassembler for PowerPC, based on X86MCSymbolizer, and start supporting some PowerPC-specific relocations as suggested.

At this time, I don’t have any additional patches on top of this one, but I will be sure to share any updates as they become available.

Thank you as well for the suggestion regarding PPCMCTargetDesc.h. I will update the code to include this header and remove the copying of *.inc files in the CMakeLists.

[maksfb]

@kostasalv, sounds good. You can take a look at other targets (x86, aarch64, RISC-V), they follow pretty much the same pattern in respective CMakeLists.txt files.

For the "Hello world" test, you can start with building CFG and verifying a couple of symbolic reference resolutions.

x86-64 and AArch64 have their versions of symbolic disassembler (*MCSymbolizer class). I suggest you take a look at those to get an idea of what it takes to restore symbol references. Note that due to the lack of active maintenance, RISC-V does not have its symbolizer and has target-specific code in BinaryFunction.cpp.