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AMDGPU: Fix true16 d16 entry table for DS pseudos #156419

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Sep 3, 2025
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AMDGPU: Fix true16 d16 entry table for DS pseudos #156419

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5 changes: 3 additions & 2 deletions llvm/lib/Target/AMDGPU/DSInstructions.td
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Original file line number Diff line number Diff line change
Expand Up @@ -127,11 +127,12 @@ multiclass DS_1A1D_NORET_mc<string opName, RegisterClass rc = VGPR_32> {
}
}

multiclass DS_1A1D_NORET_t16<string opName, RegisterClass rc = VGPR_32>
multiclass DS_1A1D_NORET_t16<string opName, RegisterClass rc = VGPR_32>
: DS_1A1D_NORET_mc<opName, rc> {
let has_m0_read = 0 in {
let True16Predicate = UseRealTrue16Insts in {
def "_t16" : DS_1A1D_NORET<opName#"_t16", VGPR_16>, True16D16Table<NAME#"_D16_HI", NAME>;
def "_t16" : DS_1A1D_NORET<opName#"_t16", VGPR_16>,
True16D16Table<NAME#"_D16_HI", NAME#"_gfx9">;
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Why gfx9, it does not have t16?

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Oh, I see, we do not define gfx11/gfx12 pseudos.

}
}
}
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