[WIP][InstCombine] Add assume-based optimizations for equality and AMDGPU ballot patterns

[TejaX-Alaghari]

Summary

This PR implements two focused optimizations in InstCombine that leverage llvm.assume intrinsics to propagate known values and enable better constant folding.

Motivation

The LLVM assume intrinsic provides compiler hints about value properties, but current optimizations don't fully leverage these hints for constant propagation. This PR adds two simple, fact-based optimizations that work with any code using assumes to assert value properties.

Approach

Instead of complex uniformity analysis, this implementation uses simple mathematical facts:

1. Basic Equality Propagation

When we see assume(x == constant), we know that x equals that constant in any code dominated by the assume. We can replace uses of x with the constant.

2. AMDGPU Ballot Property

When we see assume(ballot(cmp) == -1), we know that cmp evaluated to true in all active lanes. We can replace uses of cmp with true.

Both optimizations use isValidAssumeForContext() to ensure dominance, making them safe and correct.

Examples

Example 1: Basic Equality

define i32 @simple(i32 %a) {
  %cmp = icmp eq i32 %a, 4
  call void @llvm.assume(i1 %cmp)
  ret i32 %a
}

After optimization:

define i32 @simple(i32 %a) {
  %cmp = icmp eq i32 %a, 4
  call void @llvm.assume(i1 %cmp)
  ret i32 4  ; %a replaced with constant 4
}

Example 2: AMDGPU Ballot Pattern

define void @assume_ballot(i32 %x) {
  %cmp = icmp eq i32 %x, 0
  %ballot = call i64 @llvm.amdgcn.ballot.i64(i1 %cmp)
  %all = icmp eq i64 %ballot, -1
  call void @llvm.assume(i1 %all)
  br i1 %cmp, label %foo, label %bar
  
foo:
  ret void
  
bar:
  ret void
}

After optimization:

define void @assume_ballot(i32 %x) {
  %cmp = icmp eq i32 %x, 0
  %ballot = call i64 @llvm.amdgcn.ballot.i64(i1 %cmp)
  %all = icmp eq i64 %ballot, -1
  call void @llvm.assume(i1 %all)
  br i1 true, label %foo, label %bar  ; %cmp replaced with true
  
foo:
  ret void
  
bar:
  ret void
}

Further passes (like SimplifyCFG) can then eliminate the dead %bar block.

Testing

Added comprehensive tests in:

• llvm/test/Transforms/InstCombine/assume.ll - Tests both optimizations
• llvm/test/Transforms/InstCombine/AMDGPU/amdgpu-simplify-ballot-intrinsic.ll - AMDGPU-specific tests

All tests pass, demonstrating:

• Basic equality works: assume(x==42) + add x,1 → constant 43
• Ballot optimization works: assume(ballot(cmp)==-1) + br cmp → br true
• Combined optimizations work correctly

Other Intrinsic Patterns

Could extend to other intrinsics that establish value properties:

• readfirstlane(x) == c → x == c
• Similar patterns for other architectures

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[llvmbot]

@llvm/pr-subscribers-llvm-transforms

@llvm/pr-subscribers-backend-amdgpu

Author: Teja Alaghari (TejaX-Alaghari)

Changes

Summary

This PR implements an InstCombine optimization that recognizes when AMDGPU ballot intrinsics are used with assumptions about uniformity, specifically the pattern assume(ballot(cmp) == -1).

Problem

In AMDGPU code, developers often use ballot intrinsics to test uniformity of conditions across a wavefront:

%cmp = icmp eq i32 %x, 0
%ballot = call i64 @<!-- -->llvm.amdgcn.ballot.i64(i1 %cmp)
%uniform = icmp eq i64 %ballot, -1
call void @<!-- -->llvm.assume(i1 %uniform)
br i1 %cmp, label %then, label %else

When ballot(cmp) == -1, we know that cmp evaluates to true on all active lanes, making it uniform. However, existing optimizations didn't recognize this pattern, leaving expensive ballot calls and potentially divergent control flow.

Solution

This optimization adds pattern matching in InstCombine's visitCallInst for llvm.assume intrinsics to detect:

• assume(icmp eq (ballot(cmp), -1)) patterns
• Both i32 and i64 ballot variants (@<!-- -->llvm.amdgcn.ballot.i32 and @<!-- -->llvm.amdgcn.ballot.i64)

When detected, it:

1. Replaces the ballot condition cmp with ConstantInt::getTrue()
2. Simplifies the assumption to always true
3. Enables subsequent passes (like SimplifyCFG) to eliminate dead branches

Example Transformation

Before:

%cmp = icmp eq i32 %x, 0
%ballot = call i64 @<!-- -->llvm.amdgcn.ballot.i64(i1 %cmp)
%uniform = icmp eq i64 %ballot, -1
call void @<!-- -->llvm.assume(i1 %uniform)

After InstCombine:

br i1 true, label %then, label %else

After SimplifyCFG:

; Direct branch to %then, %else eliminated

---

Full diff: https://github.com/llvm/llvm-project/pull/160670.diff

2 Files Affected:

• (modified) llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp (+33)
• (added) llvm/test/Transforms/InstCombine/amdgpu-assume-ballot-uniform.ll (+108)

diff --git a/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp b/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
index 6ad493772d170..c23a4e3dfbaf3 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
@@ -3519,6 +3519,39 @@ Instruction *InstCombinerImpl::visitCallInst(CallInst &CI) {
       }
     }
 
+    // Optimize AMDGPU ballot uniformity assumptions:
+    // assume(icmp eq (ballot(cmp), -1)) implies that cmp is uniform and true
+    // This allows us to optimize away the ballot and replace cmp with true
+    Value *BallotInst;
+    if (match(IIOperand, m_SpecificICmp(ICmpInst::ICMP_EQ, m_Value(BallotInst),
+                                        m_AllOnes()))) {
+      // Check if this is an AMDGPU ballot intrinsic
+      if (auto *BallotCall = dyn_cast<IntrinsicInst>(BallotInst)) {
+        if (BallotCall->getIntrinsicID() == Intrinsic::amdgcn_ballot) {
+          Value *BallotCondition = BallotCall->getArgOperand(0);
+
+          // If ballot(cmp) == -1, then cmp is uniform across all lanes and
+          // evaluates to true We can safely replace BallotCondition with true
+          // since ballot == -1 implies all lanes are true
+          if (BallotCondition->getType()->isIntOrIntVectorTy(1) &&
+              !isa<Constant>(BallotCondition)) {
+
+            // Add the condition to the worklist for further optimization
+            Worklist.pushValue(BallotCondition);
+
+            // Replace BallotCondition with true
+            BallotCondition->replaceAllUsesWith(
+                ConstantInt::getTrue(BallotCondition->getType()));
+
+            // The assumption is now always true, so we can simplify it
+            replaceUse(II->getOperandUse(0),
+                       ConstantInt::getTrue(II->getContext()));
+            return II;
+          }
+        }
+      }
+    }
+
     // If there is a dominating assume with the same condition as this one,
     // then this one is redundant, and should be removed.
     KnownBits Known(1);
diff --git a/llvm/test/Transforms/InstCombine/amdgpu-assume-ballot-uniform.ll b/llvm/test/Transforms/InstCombine/amdgpu-assume-ballot-uniform.ll
new file mode 100644
index 0000000000000..3bf3b317b0771
--- /dev/null
+++ b/llvm/test/Transforms/InstCombine/amdgpu-assume-ballot-uniform.ll
@@ -0,0 +1,108 @@
+; RUN: opt < %s -passes=instcombine -S | FileCheck %s
+
+; Test case for optimizing AMDGPU ballot + assume patterns
+; When we assume that ballot(cmp) == -1, we know that cmp is uniform
+; This allows us to optimize away the ballot and directly branch
+
+define void @test_assume_ballot_uniform(i32 %x) {
+; CHECK-LABEL: @test_assume_ballot_uniform(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    br i1 true, label [[FOO:%.*]], label [[BAR:%.*]]
+; CHECK:       foo:
+; CHECK-NEXT:    ret void
+; CHECK:       bar:
+; CHECK-NEXT:    ret void
+;
+entry:
+  %cmp = icmp eq i32 %x, 0
+  %ballot = call i64 @llvm.amdgcn.ballot.i64(i1 %cmp)
+  %all = icmp eq i64 %ballot, -1
+  call void @llvm.assume(i1 %all)
+  br i1 %cmp, label %foo, label %bar
+
+foo:
+  ret void
+
+bar:
+  ret void
+}
+
+; Test case with partial optimization - only ballot removal without branch optimization
+define void @test_assume_ballot_partial(i32 %x) {
+; CHECK-LABEL: @test_assume_ballot_partial(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    br i1 true, label [[FOO:%.*]], label [[BAR:%.*]]
+; CHECK:       foo:
+; CHECK-NEXT:    ret void
+; CHECK:       bar:
+; CHECK-NEXT:    ret void
+;
+entry:
+  %cmp = icmp eq i32 %x, 0
+  %ballot = call i64 @llvm.amdgcn.ballot.i64(i1 %cmp)
+  %all = icmp eq i64 %ballot, -1
+  call void @llvm.assume(i1 %all)
+  br i1 %cmp, label %foo, label %bar
+
+foo:
+  ret void
+
+bar:
+  ret void
+}
+
+; Negative test - ballot not compared to -1
+define void @test_assume_ballot_not_uniform(i32 %x) {
+; CHECK-LABEL: @test_assume_ballot_not_uniform(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i32 [[X:%.*]], 0
+; CHECK-NEXT:    [[BALLOT:%.*]] = call i64 @llvm.amdgcn.ballot.i64(i1 [[CMP]])
+; CHECK-NEXT:    [[SOME:%.*]] = icmp ne i64 [[BALLOT]], 0
+; CHECK-NEXT:    call void @llvm.assume(i1 [[SOME]])
+; CHECK-NEXT:    br i1 [[CMP]], label [[FOO:%.*]], label [[BAR:%.*]]
+; CHECK:       foo:
+; CHECK-NEXT:    ret void
+; CHECK:       bar:
+; CHECK-NEXT:    ret void
+;
+entry:
+  %cmp = icmp eq i32 %x, 0
+  %ballot = call i64 @llvm.amdgcn.ballot.i64(i1 %cmp)
+  %some = icmp ne i64 %ballot, 0
+  call void @llvm.assume(i1 %some)
+  br i1 %cmp, label %foo, label %bar
+
+foo:
+  ret void
+
+bar:
+  ret void
+}
+
+; Test with 32-bit ballot
+define void @test_assume_ballot_uniform_i32(i32 %x) {
+; CHECK-LABEL: @test_assume_ballot_uniform_i32(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    br i1 true, label [[FOO:%.*]], label [[BAR:%.*]]
+; CHECK:       foo:
+; CHECK-NEXT:    ret void
+; CHECK:       bar:
+; CHECK-NEXT:    ret void
+;
+entry:
+  %cmp = icmp eq i32 %x, 0
+  %ballot = call i32 @llvm.amdgcn.ballot.i32(i1 %cmp)
+  %all = icmp eq i32 %ballot, -1  
+  call void @llvm.assume(i1 %all)
+  br i1 %cmp, label %foo, label %bar
+
+foo:
+  ret void
+
+bar:
+  ret void
+}
+
+declare i64 @llvm.amdgcn.ballot.i64(i1)
+declare i32 @llvm.amdgcn.ballot.i32(i1)
+declare void @llvm.assume(i1)

[arsenm]

I don't understand why this is being folded in the context of the assume argument. If we want to do that fold, this is probably not the right place for it. The assume isn't doing anything here

In AMDGPU code, developers often use ballot intrinsics to test uniformity of conditions across a wavefront:

Do they? Does this actually do anything? I attempted to make use of this in https://reviews.llvm.org/D137142, but it was never completed. Did that get separately implemented?

assume(icmp eq (ballot(cmp), -1))

Isn't the ballot result anded with exec? Such that this assume is only correct for full dispatches at the entry to the kernel?

[PankajDwivedi-25]

It's either way; here, uniformity will report values as divergent because it propagates the uniformity forward. The presence of compiler hint @llvm.assume here makes its operand True, which we know will hold for all the lanes. Hence, there is scope for pattern optimization if the @llvm.assume operand is derived from some operation that is used in the branch, because the branch will always choose the same path, which will be statically known in the presence of @llvm.assume.

[PankajDwivedi-25]

This work should be part of the general pattern optimization, not sure if we have some dedicated pass instCombine for AMDGPU @arsenm.

[PankajDwivedi-25]

The ballot here can not be assumed to be uniform; the right way would be to query the UI, and similar work is already been done in patch #116953.

The point here is that even UI reports it as divergent because it doesn't consider the presence of @llvm.assume later.

better we apply after considering the presence of @llvm.assume.

[TejaX-Alaghari]

Updated the code accordingly now.

[arsenm]

Previous questions unanswered. I don't understand why this would be performed in the context of an assume, and not on the free-form pattern. Also, I would expect the assume to inform uniformity analysis, not just be dropped here

[PankajDwivedi-25]

assume(icmp eq (ballot(cmp), -1))

Isn't the ballot result anded with exec?

I don't know why this point is relevant here; all I can see is that the ballot result must be true for all lanes.

Such that this assume is only correct for full dispatches at the entry to the kernel?

I thought we just assume its operand is true irrespective of the context where it is present.

[TejaX-Alaghari]

Hey @arsenm,

Thanks for your quick response :)

The current PR description doesn't make justice to the problem that's being solved! which has caused a lot of confusion (my bad). I'll mark the PR as a draft until the implementation details are ironed out!

Let me re-iterate the problem statement and the approach I'm aiming for, in my view -

Per Uniformity Analysis (UA), %cmp value is considered divergent in the example kernel above. But llvm.assume flips that assumption if we follow backwards through the use-def chain (%uniform -> %ballot -> %cmp)

I don't understand why this is being folded in the context of the assume argument.

The presence of llvm.assume line makes us safely infer that %uniform, %ballot & %cmp are uniform. Which is why, the implementation is designed to fold relying on llvm.assume.

I attempted to make use of this in https://reviews.llvm.org/D137142, but it was never completed. Did that get separately implemented?

I'm not sure whether it got implemented (these patterns don't currently exist in meaningful numbers). The optimization I'm proposing is based on theoretical utility that the pattern could be useful for explicit uniformity assertions.

Also, I would expect the assume to inform uniformity analysis, not just be dropped here

Currently, there is a limitation with the UA that it cannot propagate the assumptions backward (like uniform -> ballot -> cmp). So, this implementation is trying to play the role of a temporary patch which can be removed when this functionality is implemented in the UA.

[ssahasra]

Isn't the ballot result anded with exec? Such that this assume is only correct for full dispatches at the entry to the kernel?

AMDGPU backend only cares about uniformity within the active lanes of a wave. I didn't really understand the second sentence.

[ssahasra]

I don't see why uniformity should be mentioned anywhere in this patch at all. If the result of a ballot is "-1", then its operand is "1" in every lane of the wave. But that's all that is needed. The further implication that the operand is uniform is not relevant to this optimization. It's an unnecessary conflation between the facts implied by an assume on the one hand and uniformity implied by those facts on the other hand. The latter is not needed and should be removed from this patch.

[ssahasra]

Isn't the ballot result anded with exec? Such that this assume is only correct for full dispatches at the entry to the kernel?

AMDGPU backend only cares about uniformity within the active lanes of a wave. I didn't really understand the second sentence.

On second thought, I think I know what you mean. Inside a divergent branch, if the program wants to check if a value is uniform for the active lanes, the result of the ballot will be checked against execmask and not "-1". That pattern should also be added to this patch.

[nikic]

InstCombine is not really the right place for this kind of transform, or at least not in this form.

If you want to propagate the condition being true or an icmp equality, the place for that would be the equality propagation in GVN.

[TejaX-Alaghari]

Updated Implementation - Addressing Reviewer Feedback

Thank you all for the valuable feedback! I've significantly revised the implementation based on your comments, particularly @ssahasra's critical insight about avoiding uniformity concepts.

Key Changes Made

1. Removed All Uniformity Concepts ✅
Following @ssahasra's guidance, the new implementation uses pure mathematical facts without any uniformity analysis:

• Removed: Complex optimizeAssumedUniformValues() framework
• Removed: All uniformity terminology and concepts
• Added: Two focused, fact-based optimizations

2. Simple Mathematical Facts Only

The implementation now relies solely on basic mathematical properties:

// Optimization 1: Basic equality
// assume(x == 42) → dominated uses of x become 42
// Pure fact: if we assume x equals a constant, we can use that constant

// Optimization 2: AMDGPU ballot property  
// assume(ballot(cmp) == -1) → dominated uses of cmp become true
// Pure fact: ballot == -1 means cmp is true in all lanes (no uniformity needed)

3. Dominance-Based Safety

Both optimizations use isValidAssumeForContext() to ensure we only replace uses that are dominated by the assume, making the transformation safe and correct.

Testing

The implementation covers two independent patterns:

1. Generic equality pattern (works for any target):

   assume(icmp eq %x, 42)
   %use = add i32 %x, 1  ; → add i32 42, 1

2. AMDGPU ballot pattern (target-specific but using generic approach):

   assume(icmp eq (ballot(%cmp), -1))
   br i1 %cmp  ; → br i1 true

Addressing Specific Concerns

@ssahasra's requirement: Fully addressed - no uniformity concepts, just mathematical facts

@arsenm's exec mask concern: The mathematical fact holds regardless - if ballot(cmp) == -1 is assumed true, then cmp must be true in all lanes that contributed to that ballot result

Open Question: Architecture

@nikic, I'd like to understand the concern regarding InstCombine being the right place for this optimization better.

My reasoning for InstCombine:

1. InstCombine already processes assume intrinsics extensively
2. Early optimization enables constant propagation that benefits later passes
3. Simple pattern matching straightforward rewrites, avoiding complex dataflow analysis
4. InstCombine already does similar assume-based optimizations (see simple test case)

However, if the consensus is that equality propagation from assumes belongs in GVN, I'm happy to move it there. Could you clarify:

• Is the concern specific to the assume-based equality propagation in general?
• Or is it about the AMDGPU-specific ballot pattern being in generic InstCombine?
• Would splitting this into two separate patches help (generic equality in GVN, ballot pattern in InstCombine)?

Summary

The implementation is now clean, focused, and uses only simple mathematical facts without uniformity concepts. I believe it addresses the main technical concerns, but I'd appreciate guidance on the architectural question before proceeding.

[ssahasra]

Still need to answer whether this is the right place for doing this transform. Also, another feature request for future work:

If ballot == -1 appears inside a conditional branch, then UA should assume that the branch condition is uniform.

This is a whole new enhancement, and not in scope for the current patch.

[ssahasra]

Why was this moved?

[TejaX-Alaghari]

The ballot(false) → 0 optimization moved to execute after Wave32 conversion instead of before. This ensures:

1. Wave32 conversion happens first (i64 → i32 ballot + zext)
2. Then constant folding applies
   Which feels like a more consistent optimization order

Is this the right approach, or should it stay before Wave32 conversion?

[ssahasra]

Suggested change

	// Basic assume equality optimization: assume(x == c) -> replace dominated uses of x with c
	// Basic assume equality optimization: assume(x == c) -> replace uses of x with c

LLVM IR is SSA ... a value always dominates all its uses.

[jayfoad]

Of course uses of x are dominated by the definition of x. This comment refers to uses of x dominated by the "assume".

[ssahasra]

Ouch! I totally missed that. Now I see that isValidAssumeForContext() actually checks dominance to make sure that the assume applies at the use of x.

[ssahasra]

Out of curiousity, does LLVM already have utilities to match patterns like this in the IR? Seems like rather repetitive work.

[TejaX-Alaghari]

Currently using PatternMatch.h (m_SpecificICmp, m_Value, m_AllOnes). Are you aware of higher-level utilities that could simplify this? Happy to refactor if there's a better approach!

[ssahasra]

Can the pattern match be used here at this point?

[ssahasra]

Out of curiosity, when a user of a value not an instruction? Should this be a static cast?

[TejaX-Alaghari]

Using dyn_cast<Instruction> filters for instructions since we need the dominance check. Should I add a comment explaining this?

[ssahasra]

Rephrasing, I believe that the dyn_cast will always succeed, and hence it can be replaced with a cast. But I do need confirmation that my belief is right. Also, what dominance check?

[ssahasra]

We are deep inside a conditional where II is a call to @llvm.assume and its only operand is ICmp. I don't think we need to check if UseInst is II.

[TejaX-Alaghari]

• Removed UseInst != II check in the ICmp block (we're deep inside a conditional where II is the assume)
• Kept UseInst != ICmp to avoid replacing uses in the comparison itself
• Kept UseInst != IntrCall in ballot block to avoid replacing uses in the ballot call

[ssahasra]

I don't know how the whole traversal works, but do we need to push Variable as well as its uses? Will that result in duplicate work?

[TejaX-Alaghari]

We push both:

• U->getUser(): Instructions now using constants (enables further simplification)
• Variable: The modified value (allows DCE if it becomes dead)

The worklist uses a set-based structure that deduplicates, so no duplicate work. Should I add a comment?

[ssahasra]

Deduplication at insertion into a set is itself duplicate work. If the uses will eventually be visited anyway, they should not be pushed here.

[ssahasra]

Suggested change

	SmallVector<Use *, 8> DominatedUses;
	SmallVector<Use *, 8> Uses;

Everywhere in the code, dominated is always true and shouldn't be included in the name.

[TejaX-Alaghari]

• Updated comments: "replace uses of x with c" (not "replace dominated uses")
• Renamed variables: Uses instead of DominatedUses
• Updated test comments

[ssahasra]

I am doubtful about the value of this comparison in real life. I would expect that in the vast majority of programs, the actual comparison is with execmask and not -1. If that is the case, this part needs to be enhanced to cover execmask.

[TejaX-Alaghari]

You're right! Inside divergent branches, code would use:

%ballot = call i64 @llvm.amdgcn.ballot.i64(i1 %cmp)
%uniform = icmp eq i64 %ballot, %exec
call void @llvm.assume(i1 %uniform)

@ssahasra, Can you please guide me in figuring out how to access the exec mask value in InstCombine?

[ssahasra]

Really please remove "dominated" from everywhere.

[github-actions]

✅ With the latest revision this PR passed the C/C++ code formatter.

[ssahasra]

Also please remove any mention of uniformity in the change title and change description as well.

[nikic]

This looks like AI slop. It seems like you are even generating responses to review comments using AI, which is very disrespectful and also where my willingness for further engagement drops to zero.

[ssahasra]

If github had a reject button, I would have used that for sure. Please arrange an internal review of the process involved in the making of this change.

[TejaX-Alaghari]

It wasn't my intention to disrespect any of the reviewer's time and expertise that helped to advice me in this PR. I sincerely apologize for my approach in relying much on AI.

This has been a valuable experience for me. I'll re-work my implementation and get back.