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[AArch64] Support commuted operands in performFlagSettingCombine #162496

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[AArch64] Support commuted operands in performFlagSettingCombine #162496

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98cbbdf
[AArch64] Support commuted operands in performFlagSettingCombine
c-rhodes Oct 8, 2025
d29a9f6
address comments
c-rhodes Oct 9, 2025
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20 changes: 16 additions & 4 deletions llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -26192,10 +26192,22 @@ static SDValue performFlagSettingCombine(SDNode *N,
return DCI.CombineTo(N, Res, SDValue(N, 1));
}

// Combine identical generic nodes into this node, re-using the result.
if (SDNode *Generic = DCI.DAG.getNodeIfExists(
GenericOpcode, DCI.DAG.getVTList(VT), {LHS, RHS}))
DCI.CombineTo(Generic, SDValue(N, 0));
// Combine equivalent generic nodes into this node, re-using the result.
auto CombineToExistingGeneric = [&](SDValue Op0, SDValue Op1) {
if (SDNode *Generic = DCI.DAG.getNodeIfExists(
GenericOpcode, DCI.DAG.getVTList(VT), {Op0, Op1})) {
DCI.CombineTo(Generic, SDValue(N, 0));
return true;
}
return false;
};

if (CombineToExistingGeneric(LHS, RHS))
return SDValue();

if (DCI.DAG.getTargetLoweringInfo().isCommutativeBinOp(GenericOpcode) &&
CombineToExistingGeneric(RHS, LHS))
return SDValue();

return SDValue();
}
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6 changes: 2 additions & 4 deletions llvm/test/CodeGen/AArch64/adds_cmn.ll
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Expand Up @@ -22,10 +22,8 @@ entry:
define { i32, i32 } @adds_cmn_c(i32 noundef %x, i32 noundef %y) {
; CHECK-LABEL: adds_cmn_c:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: cmn w0, w1
; CHECK-NEXT: add w1, w1, w0
; CHECK-NEXT: cset w8, lo
; CHECK-NEXT: mov w0, w8
; CHECK-NEXT: adds w1, w0, w1
; CHECK-NEXT: cset w0, lo
; CHECK-NEXT: ret
entry:
%0 = tail call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %x, i32 %y)
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6 changes: 2 additions & 4 deletions llvm/test/CodeGen/AArch64/sat-add.ll
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Expand Up @@ -290,8 +290,7 @@ define i32 @unsigned_sat_variable_i32_using_cmp_sum(i32 %x, i32 %y) {
define i32 @unsigned_sat_variable_i32_using_cmp_notval(i32 %x, i32 %y) {
; CHECK-LABEL: unsigned_sat_variable_i32_using_cmp_notval:
; CHECK: // %bb.0:
; CHECK-NEXT: add w8, w0, w1
; CHECK-NEXT: cmn w1, w0
; CHECK-NEXT: adds w8, w1, w0
; CHECK-NEXT: csinv w0, w8, wzr, lo
; CHECK-NEXT: ret
%noty = xor i32 %y, -1
Expand Down Expand Up @@ -331,8 +330,7 @@ define i64 @unsigned_sat_variable_i64_using_cmp_sum(i64 %x, i64 %y) {
define i64 @unsigned_sat_variable_i64_using_cmp_notval(i64 %x, i64 %y) {
; CHECK-LABEL: unsigned_sat_variable_i64_using_cmp_notval:
; CHECK: // %bb.0:
; CHECK-NEXT: add x8, x0, x1
; CHECK-NEXT: cmn x1, x0
; CHECK-NEXT: adds x8, x1, x0
; CHECK-NEXT: csinv x0, x8, xzr, lo
; CHECK-NEXT: ret
%noty = xor i64 %y, -1
Expand Down