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[RISCV] Remove intrinsic declarations in tests, NFC #167474

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5614a10
[RISCV] Remove intrinsic declarations in tests, NFC
jacquesguan Nov 11, 2025
bbbdc43
Remove redundant attribute
jacquesguan Nov 12, 2025
aba6e86
Remove redundant comment
jacquesguan Nov 13, 2025
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17 changes: 0 additions & 17 deletions llvm/test/CodeGen/RISCV/GlobalISel/double-arith.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -121,8 +121,6 @@ define double @fdiv_d(double %a, double %b) nounwind {
ret double %1
}

declare double @llvm.sqrt.f64(double)

define double @fsqrt_d(double %a) nounwind {
; CHECKIFD-LABEL: fsqrt_d:
; CHECKIFD: # %bb.0:
Expand Down Expand Up @@ -150,8 +148,6 @@ define double @fsqrt_d(double %a) nounwind {
ret double %1
}

declare double @llvm.copysign.f64(double, double)

define double @fsgnj_d(double %a, double %b) nounwind {
; CHECKIFD-LABEL: fsgnj_d:
; CHECKIFD: # %bb.0:
Expand Down Expand Up @@ -261,8 +257,6 @@ define double @fsgnjn_d(double %a, double %b) nounwind {
ret double %2
}

declare double @llvm.fabs.f64(double)

; This function performs extra work to ensure that
; DAGCombiner::visitBITCAST doesn't replace the fabs with an and.
define double @fabs_d(double %a, double %b) nounwind {
Expand Down Expand Up @@ -305,8 +299,6 @@ define double @fabs_d(double %a, double %b) nounwind {
ret double %3
}

declare double @llvm.minnum.f64(double, double)

define double @fmin_d(double %a, double %b) nounwind {
; CHECKIFD-LABEL: fmin_d:
; CHECKIFD: # %bb.0:
Expand Down Expand Up @@ -334,8 +326,6 @@ define double @fmin_d(double %a, double %b) nounwind {
ret double %1
}

declare double @llvm.maxnum.f64(double, double)

define double @fmax_d(double %a, double %b) nounwind {
; CHECKIFD-LABEL: fmax_d:
; CHECKIFD: # %bb.0:
Expand Down Expand Up @@ -363,8 +353,6 @@ define double @fmax_d(double %a, double %b) nounwind {
ret double %1
}

declare double @llvm.minimumnum.f64(double, double)

define double @fminimumnum_d(double %a, double %b) nounwind {
; CHECKIFD-LABEL: fminimumnum_d:
; CHECKIFD: # %bb.0:
Expand Down Expand Up @@ -392,8 +380,6 @@ define double @fminimumnum_d(double %a, double %b) nounwind {
ret double %1
}

declare double @llvm.maximumnum.f64(double, double)

define double @fmaximumnum_d(double %a, double %b) nounwind {
; CHECKIFD-LABEL: fmaximumnum_d:
; CHECKIFD: # %bb.0:
Expand Down Expand Up @@ -421,8 +407,6 @@ define double @fmaximumnum_d(double %a, double %b) nounwind {
ret double %1
}

declare double @llvm.fma.f64(double, double, double)

define double @fmadd_d(double %a, double %b, double %c) nounwind {
; CHECKIFD-LABEL: fmadd_d:
; CHECKIFD: # %bb.0:
Expand Down Expand Up @@ -771,7 +755,6 @@ define double @fnmadd_d_3(double %a, double %b, double %c) nounwind {
ret double %neg
}


define double @fnmadd_nsz(double %a, double %b, double %c) nounwind {
; CHECKIFD-LABEL: fnmadd_nsz:
; CHECKIFD: # %bb.0:
Expand Down
45 changes: 0 additions & 45 deletions llvm/test/CodeGen/RISCV/GlobalISel/double-intrinsics.ll
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Expand Up @@ -10,8 +10,6 @@
; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -global-isel \
; RUN: | FileCheck -check-prefix=RV64I %s

declare double @llvm.sqrt.f64(double)

define double @sqrt_f64(double %a) nounwind {
; CHECKIFD-LABEL: sqrt_f64:
; CHECKIFD: # %bb.0:
Expand Down Expand Up @@ -81,8 +79,6 @@ define double @powi_f64(double %a, i32 %b) nounwind {
ret double %1
}

declare double @llvm.sin.f64(double)

define double @sin_f64(double %a) nounwind {
; RV32IFD-LABEL: sin_f64:
; RV32IFD: # %bb.0:
Expand Down Expand Up @@ -123,8 +119,6 @@ define double @sin_f64(double %a) nounwind {
ret double %1
}

declare double @llvm.cos.f64(double)

define double @cos_f64(double %a) nounwind {
; RV32IFD-LABEL: cos_f64:
; RV32IFD: # %bb.0:
Expand Down Expand Up @@ -257,8 +251,6 @@ define double @sincos_f64(double %a) nounwind {
ret double %3
}

declare double @llvm.pow.f64(double, double)

define double @pow_f64(double %a, double %b) nounwind {
; RV32IFD-LABEL: pow_f64:
; RV32IFD: # %bb.0:
Expand Down Expand Up @@ -299,8 +291,6 @@ define double @pow_f64(double %a, double %b) nounwind {
ret double %1
}

declare double @llvm.exp.f64(double)

define double @exp_f64(double %a) nounwind {
; RV32IFD-LABEL: exp_f64:
; RV32IFD: # %bb.0:
Expand Down Expand Up @@ -341,8 +331,6 @@ define double @exp_f64(double %a) nounwind {
ret double %1
}

declare double @llvm.exp2.f64(double)

define double @exp2_f64(double %a) nounwind {
; RV32IFD-LABEL: exp2_f64:
; RV32IFD: # %bb.0:
Expand Down Expand Up @@ -423,8 +411,6 @@ define double @exp10_f64(double %a) nounwind {
ret double %1
}

declare double @llvm.log.f64(double)

define double @log_f64(double %a) nounwind {
; RV32IFD-LABEL: log_f64:
; RV32IFD: # %bb.0:
Expand Down Expand Up @@ -465,8 +451,6 @@ define double @log_f64(double %a) nounwind {
ret double %1
}

declare double @llvm.log10.f64(double)

define double @log10_f64(double %a) nounwind {
; RV32IFD-LABEL: log10_f64:
; RV32IFD: # %bb.0:
Expand Down Expand Up @@ -507,8 +491,6 @@ define double @log10_f64(double %a) nounwind {
ret double %1
}

declare double @llvm.log2.f64(double)

define double @log2_f64(double %a) nounwind {
; RV32IFD-LABEL: log2_f64:
; RV32IFD: # %bb.0:
Expand Down Expand Up @@ -549,8 +531,6 @@ define double @log2_f64(double %a) nounwind {
ret double %1
}

declare double @llvm.fma.f64(double, double, double)

define double @fma_f64(double %a, double %b, double %c) nounwind {
; CHECKIFD-LABEL: fma_f64:
; CHECKIFD: # %bb.0:
Expand Down Expand Up @@ -578,8 +558,6 @@ define double @fma_f64(double %a, double %b, double %c) nounwind {
ret double %1
}

declare double @llvm.fmuladd.f64(double, double, double)

define double @fmuladd_f64(double %a, double %b, double %c) nounwind {
; CHECKIFD-LABEL: fmuladd_f64:
; CHECKIFD: # %bb.0:
Expand Down Expand Up @@ -621,8 +599,6 @@ define double @fmuladd_f64(double %a, double %b, double %c) nounwind {
ret double %1
}

declare double @llvm.fabs.f64(double)

define double @fabs_f64(double %a) nounwind {
; CHECKIFD-LABEL: fabs_f64:
; CHECKIFD: # %bb.0:
Expand All @@ -644,8 +620,6 @@ define double @fabs_f64(double %a) nounwind {
ret double %1
}

declare double @llvm.minnum.f64(double, double)

define double @minnum_f64(double %a, double %b) nounwind {
; CHECKIFD-LABEL: minnum_f64:
; CHECKIFD: # %bb.0:
Expand Down Expand Up @@ -673,8 +647,6 @@ define double @minnum_f64(double %a, double %b) nounwind {
ret double %1
}

declare double @llvm.maxnum.f64(double, double)

define double @maxnum_f64(double %a, double %b) nounwind {
; CHECKIFD-LABEL: maxnum_f64:
; CHECKIFD: # %bb.0:
Expand Down Expand Up @@ -702,8 +674,6 @@ define double @maxnum_f64(double %a, double %b) nounwind {
ret double %1
}

declare double @llvm.copysign.f64(double, double)

define double @copysign_f64(double %a, double %b) nounwind {
; CHECKIFD-LABEL: copysign_f64:
; CHECKIFD: # %bb.0:
Expand Down Expand Up @@ -731,8 +701,6 @@ define double @copysign_f64(double %a, double %b) nounwind {
ret double %1
}

declare double @llvm.floor.f64(double)

define double @floor_f64(double %a) nounwind {
; RV32IFD-LABEL: floor_f64:
; RV32IFD: # %bb.0:
Expand Down Expand Up @@ -773,8 +741,6 @@ define double @floor_f64(double %a) nounwind {
ret double %1
}

declare double @llvm.ceil.f64(double)

define double @ceil_f64(double %a) nounwind {
; RV32IFD-LABEL: ceil_f64:
; RV32IFD: # %bb.0:
Expand Down Expand Up @@ -815,8 +781,6 @@ define double @ceil_f64(double %a) nounwind {
ret double %1
}

declare double @llvm.trunc.f64(double)

define double @trunc_f64(double %a) nounwind {
; RV32IFD-LABEL: trunc_f64:
; RV32IFD: # %bb.0:
Expand Down Expand Up @@ -857,8 +821,6 @@ define double @trunc_f64(double %a) nounwind {
ret double %1
}

declare double @llvm.rint.f64(double)

define double @rint_f64(double %a) nounwind {
; RV32IFD-LABEL: rint_f64:
; RV32IFD: # %bb.0:
Expand Down Expand Up @@ -899,8 +861,6 @@ define double @rint_f64(double %a) nounwind {
ret double %1
}

declare double @llvm.nearbyint.f64(double)

define double @nearbyint_f64(double %a) nounwind {
; RV32IFD-LABEL: nearbyint_f64:
; RV32IFD: # %bb.0:
Expand Down Expand Up @@ -941,8 +901,6 @@ define double @nearbyint_f64(double %a) nounwind {
ret double %1
}

declare double @llvm.round.f64(double)

define double @round_f64(double %a) nounwind {
; RV32IFD-LABEL: round_f64:
; RV32IFD: # %bb.0:
Expand Down Expand Up @@ -983,8 +941,6 @@ define double @round_f64(double %a) nounwind {
ret double %1
}

declare double @llvm.roundeven.f64(double)

define double @roundeven_f64(double %a) nounwind {
; RV32IFD-LABEL: roundeven_f64:
; RV32IFD: # %bb.0:
Expand Down Expand Up @@ -1025,7 +981,6 @@ define double @roundeven_f64(double %a) nounwind {
ret double %1
}

declare i1 @llvm.is.fpclass.f64(double, i32)
define i1 @isnan_d_fpclass(double %x) {
; CHECKIFD-LABEL: isnan_d_fpclass:
; CHECKIFD: # %bb.0:
Expand Down
16 changes: 0 additions & 16 deletions llvm/test/CodeGen/RISCV/GlobalISel/float-arith.ll
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Expand Up @@ -121,8 +121,6 @@ define float @fdiv_s(float %a, float %b) nounwind {
ret float %1
}

declare float @llvm.sqrt.f32(float)

define float @fsqrt_s(float %a) nounwind {
; CHECKIF-LABEL: fsqrt_s:
; CHECKIF: # %bb.0:
Expand Down Expand Up @@ -150,8 +148,6 @@ define float @fsqrt_s(float %a) nounwind {
ret float %1
}

declare float @llvm.copysign.f32(float, float)

define float @fsgnj_s(float %a, float %b) nounwind {
; CHECKIF-LABEL: fsgnj_s:
; CHECKIF: # %bb.0:
Expand Down Expand Up @@ -270,8 +266,6 @@ define float @fsgnjn_s(float %a, float %b) nounwind {
ret float %3
}

declare float @llvm.fabs.f32(float)

define float @fabs_s(float %a, float %b) nounwind {
; CHECKIF-LABEL: fabs_s:
; CHECKIF: # %bb.0:
Expand Down Expand Up @@ -311,8 +305,6 @@ define float @fabs_s(float %a, float %b) nounwind {
ret float %3
}

declare float @llvm.minimumnum.f32(float, float)

define float @fminimumnum_s(float %a, float %b) nounwind {
; CHECKIF-LABEL: fminimumnum_s:
; CHECKIF: # %bb.0:
Expand Down Expand Up @@ -340,8 +332,6 @@ define float @fminimumnum_s(float %a, float %b) nounwind {
ret float %1
}

declare float @llvm.maximumnum.f32(float, float)

define float @fmaximumnum_s(float %a, float %b) nounwind {
; CHECKIF-LABEL: fmaximumnum_s:
; CHECKIF: # %bb.0:
Expand Down Expand Up @@ -369,8 +359,6 @@ define float @fmaximumnum_s(float %a, float %b) nounwind {
ret float %1
}

declare float @llvm.minnum.f32(float, float)

define float @fmin_s(float %a, float %b) nounwind {
; CHECKIF-LABEL: fmin_s:
; CHECKIF: # %bb.0:
Expand Down Expand Up @@ -398,8 +386,6 @@ define float @fmin_s(float %a, float %b) nounwind {
ret float %1
}

declare float @llvm.maxnum.f32(float, float)

define float @fmax_s(float %a, float %b) nounwind {
; CHECKIF-LABEL: fmax_s:
; CHECKIF: # %bb.0:
Expand Down Expand Up @@ -427,8 +413,6 @@ define float @fmax_s(float %a, float %b) nounwind {
ret float %1
}

declare float @llvm.fma.f32(float, float, float)

define float @fmadd_s(float %a, float %b, float %c) nounwind {
; CHECKIF-LABEL: fmadd_s:
; CHECKIF: # %bb.0:
Expand Down
5 changes: 0 additions & 5 deletions llvm/test/CodeGen/RISCV/GlobalISel/iabs.ll
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Expand Up @@ -8,11 +8,6 @@
; RUN: llc -mtriple=riscv64 -global-isel -mattr=+zbb -verify-machineinstrs < %s \
; RUN: | FileCheck %s --check-prefix=RV64ZBB

declare i8 @llvm.abs.i8(i8, i1 immarg)
declare i16 @llvm.abs.i16(i16, i1 immarg)
declare i32 @llvm.abs.i32(i32, i1 immarg)
declare i64 @llvm.abs.i64(i64, i1 immarg)

define i8 @abs8(i8 %x) {
; RV32I-LABEL: abs8:
; RV32I: # %bb.0:
Expand Down
1 change: 0 additions & 1 deletion llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vacopy.ll
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Expand Up @@ -4,7 +4,6 @@
; RUN: llc -mtriple=riscv64 -global-isel -stop-after=irtranslator -verify-machineinstrs < %s \
; RUN: | FileCheck -check-prefix=RV64I %s

declare void @llvm.va_copy(ptr, ptr)
define void @test_va_copy(ptr %dest_list, ptr %src_list) {
; RV32I-LABEL: name: test_va_copy
; RV32I: bb.1 (%ir-block.0):
Expand Down
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