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10 changes: 5 additions & 5 deletions dv/uvm/core_ibex/scripts/compile_tb.py
Original file line number Diff line number Diff line change
Expand Up @@ -119,9 +119,9 @@ def _main() -> int:
# Base address of the debug module. This is passed as a parameter
# at compile time as the PMP module must always allow debug mode
# accesses to it.
r" -define DM_ADDR=1A11_0000 " + \
r" -define DM_ADDR_MASK=0000_0FFF" + \
r" -define BOOT_ADDR=8000_0000 " + \
r" +define+DM_ADDR=1A11_0000 " + \
r" +define+DM_ADDR_MASK=0000_0FFF" + \
r" +define+BOOT_ADDR=8000_0000 " + \
# Spike sets the following parameters via the preprocessor defines
# DEBUG_ROM_ENTRY and DEBUG_ROM_TVEC.
# As they cannot be moved without recompiling the ISS, treat them as
Expand All @@ -131,8 +131,8 @@ def _main() -> int:
# The generated RISCV-DV assembly programs move the default vector
# table (via MTVEC), and place jump instructions at these two
# addresses to the generated debug test sections.
r" -define DEBUG_MODE_HALT_ADDR=8000_0000 " + \
r" -define DEBUG_MODE_EXCEPTION_ADDR=8000_0008 ",
r" +define+DEBUG_MODE_HALT_ADDR=8000_0000 " + \
r" +define+DEBUG_MODE_EXCEPTION_ADDR=8000_0008 ",
'dir_shared_cov': (md.dir_shared_cov if md.cov else ''),
'xlm_cov_cfg_file': f"{md.ot_xcelium_cov_scripts}/cover.ccf",
'dut_cov_rtl_path': md.dut_cov_rtl_path
Expand Down
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