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treewide: add support for S145 SoftDevice #408
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81 changes: 81 additions & 0 deletions
81
boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l05_cpuapp_s145_softdevice.dts
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,81 @@ | ||
| /* | ||
| * Copyright (c) 2025 Nordic Semiconductor ASA | ||
| * | ||
| * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause | ||
| */ | ||
|
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| /dts-v1/; | ||
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| #include <nordic/nrf54l05_cpuapp.dtsi> | ||
| #include "bm_nrf54l15dk_nrf54l05_cpuapp_common.dtsi" | ||
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| / { | ||
| chosen { | ||
| zephyr,flash = &cpuapp_rram; | ||
| zephyr,code-partition = &slot0_partition; | ||
| zephyr,sram = &app_ram; | ||
| }; | ||
| }; | ||
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| &cpuapp_rram { | ||
| status = "okay"; | ||
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| partitions { | ||
| compatible = "fixed-partitions"; | ||
| #address-cells = <1>; | ||
| #size-cells = <1>; | ||
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| slot0_partition: partition@0 { | ||
| label = "slot0"; | ||
| reg = <0x00000000 DT_SIZE_K(347)>; | ||
| }; | ||
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| storage_partition: partition@56c00 { | ||
| compatible = "fixed-subpartitions"; | ||
| label = "storage"; | ||
| reg = <0x00056c00 DT_SIZE_K(8)>; | ||
| ranges = <0x0 0x56c00 DT_SIZE_K(8)>; | ||
| #address-cells = <1>; | ||
| #size-cells = <1>; | ||
|
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| peer_manager_partition: partition@0 { | ||
| label = "peer_manager"; | ||
| reg = <0x00000000 DT_SIZE_K(4)>; | ||
| }; | ||
|
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| storage0_partition: partition@1000 { | ||
| label = "storage0"; | ||
| reg = <0x00001000 DT_SIZE_K(4)>; | ||
| }; | ||
| }; | ||
|
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| softdevice_partition: partition@58c00 { | ||
| label = "softdevice"; | ||
| reg = <0x00058c00 DT_SIZE_K(144)>; | ||
| }; | ||
| }; | ||
| }; | ||
|
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| &cpuapp_sram { | ||
| status = "okay"; | ||
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| partitions { | ||
| #address-cells = <1>; | ||
| #size-cells = <1>; | ||
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| softdevice_static_ram: partition@20000080 { | ||
| label = "softdevice_static_ram"; | ||
| reg = <0x20000080 0x1780>; | ||
| }; | ||
|
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| softdevice_dynamic_ram: partition@20001800 { | ||
| label = "softdevice_dynamic_ram"; | ||
| reg = <0x20001800 DT_SIZE_K(12)>; | ||
| }; | ||
|
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| app_ram: partition@20004800 { | ||
| label = "app_ram"; | ||
| reg = <0x20004800 DT_SIZE_K(77)>; | ||
| }; | ||
| }; | ||
| }; |
17 changes: 17 additions & 0 deletions
17
boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l05_cpuapp_s145_softdevice.yaml
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,17 @@ | ||
| # | ||
| # Copyright (c) 2025 Nordic Semiconductor | ||
| # | ||
| # SPDX-License-Identifier: LicenseRef-Nordic-5-Clause | ||
| # | ||
|
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| identifier: bm_nrf54l15dk/nrf54l05/cpuapp/s145_softdevice | ||
| name: Bare_Metal-nRF54L15-DK-nRF54L05-Application-S145-SoftDevice | ||
| type: mcu | ||
| arch: arm | ||
| toolchain: | ||
| - gnuarmemb | ||
| - xtools | ||
| - zephyr | ||
| sysbuild: true | ||
| ram: 77 | ||
| flash: 347 |
108 changes: 108 additions & 0 deletions
108
boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l05_cpuapp_s145_softdevice_defconfig
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,108 @@ | ||
| # | ||
| # Copyright (c) 2025 Nordic Semiconductor | ||
| # | ||
| # SPDX-License-Identifier: LicenseRef-Nordic-5-Clause | ||
| # | ||
|
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| # Enable console | ||
| CONFIG_CONSOLE=y | ||
| CONFIG_BM_UARTE_CONSOLE=y | ||
|
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| # Remove boot banner | ||
| CONFIG_NCS_BOOT_BANNER=n | ||
| CONFIG_BOOT_BANNER=n | ||
|
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| # Enable MPU | ||
| CONFIG_ARM_MPU=y | ||
|
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| # Enable hardware stack protection | ||
| CONFIG_HW_STACK_PROTECTION=y | ||
|
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| # MPU-based null-pointer dereferencing detection cannot | ||
| # be applied as the (0x0 - 0x400) is unmapped for this target. | ||
| CONFIG_NULL_POINTER_EXCEPTION_DETECTION_NONE=y | ||
|
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| # Enable Cache | ||
| CONFIG_CACHE_MANAGEMENT=y | ||
| CONFIG_EXTERNAL_CACHE=y | ||
|
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| # Start SYSCOUNTER on driver init | ||
| CONFIG_NRF_GRTC_START_SYSCOUNTER=y | ||
|
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| # Disable partition manager | ||
| CONFIG_PARTITION_MANAGER_ENABLED=n | ||
|
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| # Disable multithreading | ||
| CONFIG_MULTITHREADING=n | ||
| CONFIG_ZERO_LATENCY_IRQS=y | ||
|
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| # Allow FLASH writes | ||
| CONFIG_MPU_ALLOW_FLASH_WRITE=y | ||
|
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| # Shrink | ||
| CONFIG_GPIO=n | ||
| CONFIG_NRF_SECURITY=n | ||
|
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| # Enable all NRFX drivers | ||
| CONFIG_NRFX_CLOCK=y | ||
| CONFIG_NRFX_CLOCK_LFXO_TWO_STAGE_ENABLED=y | ||
| CONFIG_NRFX_COMP=y | ||
| CONFIG_NRFX_DPPI00=y | ||
| CONFIG_NRFX_DPPI10=y | ||
| CONFIG_NRFX_DPPI20=y | ||
| CONFIG_NRFX_DPPI30=y | ||
| CONFIG_NRFX_EGU10=y | ||
| CONFIG_NRFX_EGU20=y | ||
| CONFIG_NRFX_GPIOTE20=y | ||
| CONFIG_NRFX_GPIOTE30=y | ||
| CONFIG_NRFX_GPPI=y | ||
| CONFIG_NRFX_GRTC=y | ||
| CONFIG_NRFX_I2S20=y | ||
| CONFIG_NRFX_NFCT=y | ||
| CONFIG_NRFX_PDM20=y | ||
| CONFIG_NRFX_PDM21=y | ||
| CONFIG_NRFX_POWER=y | ||
| CONFIG_NRFX_PPIB00=y | ||
| CONFIG_NRFX_PPIB01=y | ||
| CONFIG_NRFX_PPIB10=y | ||
| CONFIG_NRFX_PPIB11=y | ||
| CONFIG_NRFX_PPIB20=y | ||
| CONFIG_NRFX_PPIB21=y | ||
| CONFIG_NRFX_PPIB22=y | ||
| CONFIG_NRFX_PPIB30=y | ||
| CONFIG_NRFX_PWM20=y | ||
| CONFIG_NRFX_PWM21=y | ||
| CONFIG_NRFX_PWM22=y | ||
| CONFIG_NRFX_QDEC20=y | ||
| CONFIG_NRFX_QDEC21=y | ||
| CONFIG_NRFX_RRAMC=y | ||
| CONFIG_NRFX_SAADC=y | ||
| CONFIG_NRFX_SPIM00=y | ||
| CONFIG_NRFX_SPIM20=y | ||
| CONFIG_NRFX_SPIM21=y | ||
| CONFIG_NRFX_SPIM22=y | ||
| CONFIG_NRFX_SPIM30=y | ||
| CONFIG_NRFX_SYSTICK=y | ||
| CONFIG_NRFX_TEMP=y | ||
| CONFIG_NRFX_TIMER00=y | ||
| CONFIG_NRFX_TIMER10=y | ||
| CONFIG_NRFX_TIMER20=y | ||
| CONFIG_NRFX_TIMER21=y | ||
| CONFIG_NRFX_TIMER22=y | ||
| CONFIG_NRFX_TIMER23=y | ||
| CONFIG_NRFX_TIMER24=y | ||
| CONFIG_NRFX_TWIM20=y | ||
| CONFIG_NRFX_TWIM21=y | ||
| CONFIG_NRFX_TWIM22=y | ||
| CONFIG_NRFX_TWIM30=y | ||
| CONFIG_NRFX_UARTE00=y | ||
| CONFIG_NRFX_UARTE20=y | ||
| CONFIG_NRFX_UARTE21=y | ||
| CONFIG_NRFX_UARTE22=y | ||
| CONFIG_NRFX_UARTE30=y | ||
| CONFIG_NRFX_WDT31=y | ||
| CONFIG_NRFX_PRS_BOX_0=y | ||
| CONFIG_NRFX_PRS_BOX_1=y | ||
| CONFIG_NRFX_PRS_BOX_2=y | ||
| CONFIG_NRFX_PRS_BOX_3=y | ||
| CONFIG_NRFX_PRS_BOX_4=y | ||
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lots of things should not be here, this should be taken care of by default image config
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That also applies to the S115 variants. Can we take that in a follow-up PR?