sdp: vio pins dependent on overlay #20806
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CI InformationTo view the history of this post, clich the 'edited' button above Inputs:Sources:sdk-nrf: PR head: cba650a1de55b5a4901c005843e3166cb9fa8b10 more detailssdk-nrf:
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List of changed files detected by CI (3)Outputs:ToolchainVersion: 4ffa2202d5 Test Spec & Results: ✅ Success; ❌ Failure; 🟠 Queued; 🟡 Progress; ◻️ Skipped;
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Add saving clock VIO pin on FLPR side, so that it wouldn't use a define from nrfe_mspi.h. Signed-off-by: Magdalena Pastula <[email protected]>
Add checking pin assignment from DTS to make sure that no CS pin overlaps with any data pin and that there are enough pins defined for selected mode. Signed-off-by: Magdalena Pastula <[email protected]>
Make number of pins sent in pinctrl config to FLPR dependable on number of pins defined in DTS pinctrl. Signed-off-by: Magdalena Pastula <[email protected]>
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It still needs some testing but can be reviewed already.Needs the revert commit from #20807 to be able to switch to QUAD mode (not enough pins declared in DTS).