nrfconnect · nordicjm · Oct 7, 2025 · Oct 6, 2025
@@ -333,11 +333,11 @@ Bluetooth Mesh samples
 
 * :ref:`ble_mesh_dfu_distributor` sample:
 
-  * Added support for external flash memory for the ``nrf52840dk/nrf52840`` as the secondary partition for the DFU process.
+  * Added support for external flash memory for the ``nrf52840dk/nrf52840`` and the ``nrf54l15dk/nrf54l15/cpuapp`` as the secondary partition for the DFU process.
 
 * :ref:`ble_mesh_dfu_target` sample:
 
-  * Added support for external flash memory for the ``nrf52840dk/nrf52840`` as the secondary partition for the DFU process.
+  * Added support for external flash memory for the ``nrf52840dk/nrf52840`` and the ``nrf54l15dk/nrf54l15/cpuapp`` as the secondary partition for the DFU process.
 
 * :ref:`bluetooth_mesh_sensor_client` sample:
 

@@ -254,7 +254,7 @@ Build the sample using the following command:
 .. note::
    The external flash is not erased during the internal flash erasing procedure.
    See `nRF Util`_ for more information on how to erase the external flash.
-   Currently, only the external flash on the ``nrf52840dk/nrf52840`` board is supported at the moment.
+   Currently, external flash is supported on the ``nrf52840dk/nrf52840`` board and the ``nrf54l15dk/nrf54l15/cpuapp`` board.
 
 Dependencies
 ************

@@ -0,0 +1,31 @@
+#
+# Copyright (c) 2024 Nordic Semiconductor ASA
+#
+# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
+#
+################################################################################
+# Application overlay - nrf54l15
+
+CONFIG_SOC_FLASH_NRF_PARTIAL_ERASE=n
+CONFIG_NVS=n
+CONFIG_NVS_LOOKUP_CACHE=n
+CONFIG_SETTINGS_NVS_NAME_CACHE=n
+CONFIG_ZMS=y
+CONFIG_SETTINGS_ZMS_CUSTOM_SECTOR_COUNT=y
+CONFIG_SETTINGS_ZMS_SECTOR_COUNT=8
+CONFIG_ZMS_LOOKUP_CACHE=y
+CONFIG_ZMS_LOOKUP_CACHE_SIZE=512
+CONFIG_ZMS_LOOKUP_CACHE_FOR_SETTINGS=y
+CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE=4096
+CONFIG_BT_RX_STACK_SIZE=5120
+CONFIG_SHELL_STACK_SIZE=2560
+
+# External flash specific settings
+CONFIG_GPIO=y
+CONFIG_SPI=y
+CONFIG_SPI_NOR=y
+CONFIG_SPI_NOR_SFDP_DEVICETREE=y
+CONFIG_SPI_NOR_FLASH_LAYOUT_PAGE_SIZE=4096
+# QSPI drivers are enabled by default for some chips.
+# Disable it explicitly to be sure QSPI is disabled.
+CONFIG_NORDIC_QSPI_NOR=n
@@ -0,0 +1,10 @@
+/* Copyright (c) 2025 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
+ */
+
+/ {
+	chosen {
+		zephyr,code-partition = &boot_partition;
+	};
+};
@@ -0,0 +1,12 @@
+CONFIG_GPIO=y
+CONFIG_SPI=y
+CONFIG_SPI_NOR=y
+CONFIG_SPI_NOR_SFDP_DEVICETREE=y
+CONFIG_FLASH=y
+CONFIG_MAIN_STACK_SIZE=20480
+CONFIG_BOOT_MAX_IMG_SECTORS=512
+CONFIG_SPI_NOR_FLASH_LAYOUT_PAGE_SIZE=4096
+# Ensure that the qspi driver is disabled by default
+CONFIG_NORDIC_QSPI_NOR=n
+
+CONFIG_MULTITHREADING=y
@@ -0,0 +1,48 @@
+/ {
+	chosen {
+		nordic,pm-ext-flash = &mx25r64;
+		zephyr,code-partition = &boot_partition;
+	};
+};
+
+/delete-node/ &boot_partition;
+/delete-node/ &slot0_partition;
+/delete-node/ &slot1_partition;
+
+/delete-node/ &storage_partition;
+
+&cpuapp_rram {
+	reg = < 0x0 DT_SIZE_K(1524) >;
+
+	partitions {
+		boot_partition: partition@0 {
+			label = "mcuboot";
+			reg = <0x000000000 0x00014000>;
+		};
+
+		slot0_partition: partition@14000 {
+			label = "image-0";
+			reg = <0x000014000 0x0015A000>;
+		};
+
+		storage_partition: partition@16E000 {
+			label = "storage";
+			reg = < 0x16E000 0x9000 >;
+		};
+	};
+};
+
+&mx25r64 {
+	status = "okay";
+
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		slot1_partition: partition@0 {
+			label = "image-1";
+			reg = <0x000000000 0x0015A000>;
+		};
+	};
+};
@@ -0,0 +1,39 @@
+CONFIG_PM=n
+
+CONFIG_MAIN_STACK_SIZE=10240
+
+CONFIG_BOOT_SWAP_SAVE_ENCTLV=n
+CONFIG_BOOT_ENCRYPT_IMAGE=n
+
+CONFIG_BOOT_UPGRADE_ONLY=n
+CONFIG_BOOT_BOOTSTRAP=n
+
+### mbedTLS has its own heap
+# CONFIG_HEAP_MEM_POOL_SIZE is not set
+
+CONFIG_FLASH=y
+
+### Various Zephyr boards enable features that we don't want.
+# CONFIG_BT is not set
+# CONFIG_I2C is not set
+
+CONFIG_LOG=y
+CONFIG_LOG_MODE_MINIMAL=y
+### Ensure Zephyr logging changes don't use more resources
+CONFIG_LOG_DEFAULT_LEVEL=0
+### Use info log level by default
+CONFIG_MCUBOOT_LOG_LEVEL_INF=y
+### Decrease footprint by ~4 KB in comparison to CBPRINTF_COMPLETE=y
+CONFIG_CBPRINTF_NANO=y
+### Use picolibc to reduce flash usage
+CONFIG_PICOLIBC=y
+### Disable malloc arena because we don't need it
+CONFIG_COMMON_LIBC_MALLOC_ARENA_SIZE=0
+
+# NCS boot banner
+CONFIG_NCS_APPLICATION_BOOT_BANNER_STRING="MCUboot"
+
+# RTT is used for interacting with the distributor over shell. Having it enabled in mcuboot will
+# require a user to manually provide correct _SEGGER_RTT address otherwise RTT Viewer will pick
+# wrong buffer and shell will not work.
+CONFIG_USE_SEGGER_RTT=n
@@ -0,0 +1,19 @@
+#
+# Copyright (c) 2025 Nordic Semiconductor ASA
+#
+# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
+#
+################################################################################
+CONFIG_BOOT_MAX_IMG_SECTORS=256
+
+# Ensure that the SPI NOR driver is disabled by default
+CONFIG_SPI_NOR=n
+
+CONFIG_BOOT_WATCHDOG_FEED=n
+
+# Ensure the fastest RRAM write operations
+CONFIG_NRF_RRAM_WRITE_BUFFER_SIZE=32
+
+# Link Time Optimizations
+CONFIG_ISR_TABLES_LOCAL_DECLARATION=y
+CONFIG_LTO=y
@@ -0,0 +1,19 @@
+#
+# Copyright (c) 2025 Nordic Semiconductor ASA
+#
+# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
+#
+################################################################################
+CONFIG_BOOT_MAX_IMG_SECTORS=256
+
+# Ensure that the SPI NOR driver is disabled by default
+CONFIG_SPI_NOR=n
+
+CONFIG_BOOT_WATCHDOG_FEED=n
+
+# Ensure the fastest RRAM write operations
+CONFIG_NRF_RRAM_WRITE_BUFFER_SIZE=32
+
+# Link Time Optimizations
+CONFIG_ISR_TABLES_LOCAL_DECLARATION=y
+CONFIG_LTO=y
@@ -219,7 +219,7 @@ Build the sample using the following command:
 .. note::
    The external flash is not erased during the internal flash erasing procedure.
    See `nRF Util`_ for more information on how to erase the external flash.
-   Currently, only the external flash on the ``nrf52840dk/nrf52840`` board is supported at the moment.
+   Currently, external flash is supported on the ``nrf52840dk/nrf52840`` board and the ``nrf54l15dk/nrf54l15/cpuapp`` board.
 
 Dependencies
 ************

@@ -0,0 +1,30 @@
+#
+# Copyright (c) 2024 Nordic Semiconductor ASA
+#
+# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
+#
+################################################################################
+# Application overlay - nrf54l15
+
+CONFIG_SOC_FLASH_NRF_PARTIAL_ERASE=n
+CONFIG_NVS=n
+CONFIG_NVS_LOOKUP_CACHE=n
+CONFIG_SETTINGS_NVS_NAME_CACHE=n
+CONFIG_ZMS=y
+CONFIG_SETTINGS_ZMS_CUSTOM_SECTOR_COUNT=y
+CONFIG_SETTINGS_ZMS_SECTOR_COUNT=8
+CONFIG_ZMS_LOOKUP_CACHE=y
+CONFIG_ZMS_LOOKUP_CACHE_SIZE=512
+CONFIG_ZMS_LOOKUP_CACHE_FOR_SETTINGS=y
+CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE=4096
+CONFIG_BT_RX_STACK_SIZE=5120
+
+# External flash specific settings
+CONFIG_GPIO=y
+CONFIG_SPI=y
+CONFIG_SPI_NOR=y
+CONFIG_SPI_NOR_SFDP_DEVICETREE=y
+CONFIG_SPI_NOR_FLASH_LAYOUT_PAGE_SIZE=4096
+# QSPI drivers are enabled by default for some chips.
+# Disable it explicitly to be sure QSPI is disabled.
+CONFIG_NORDIC_QSPI_NOR=n
@@ -0,0 +1,10 @@
+/* Copyright (c) 2025 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
+ */
+
+/ {
+	chosen {
+		zephyr,code-partition = &boot_partition;
+	};
+};
@@ -4,10 +4,6 @@
 # SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
 #
 ################################################################################
-# RTT is used for interacting with the distributor over shell.
-# Having it enabled in mcuboot will require a user to manually provide correct _SEGGER_RTT address.
-# Otherwise RTT Viewer will pick wrong buffer and shell will not work.
-CONFIG_USE_SEGGER_RTT=n
 
 CONFIG_NORDIC_QSPI_NOR=y
 CONFIG_NORDIC_QSPI_NOR_FLASH_LAYOUT_PAGE_SIZE=4096

@@ -0,0 +1,26 @@
+# The UART is used for Serial Recovery, so logging requires
+# an RTT console, which is not available out of the box on this board.
+# Disable logging.
+CONFIG_LOG=n
+
+# Serial
+CONFIG_CONSOLE=n
+CONFIG_SERIAL=y
+CONFIG_UART_NRFX=n
+CONFIG_UART_INTERRUPT_DRIVEN=y
+CONFIG_UART_LINE_CTRL=y
+
+# MCUBoot serial
+CONFIG_GPIO=y
+CONFIG_MCUBOOT_SERIAL=y
+CONFIG_BOOT_SERIAL_CDC_ACM=y
+
+# Required by USB
+CONFIG_MULTITHREADING=y
+
+# USB
+CONFIG_USB_DEVICE_STACK=y
+CONFIG_USB_DEVICE_REMOTE_WAKEUP=n
+CONFIG_USB_DEVICE_PRODUCT="MCUBOOT"
+
+CONFIG_NORDIC_QSPI_NOR=n
@@ -0,0 +1,12 @@
+CONFIG_GPIO=y
+CONFIG_SPI=y
+CONFIG_SPI_NOR=y
+CONFIG_SPI_NOR_SFDP_DEVICETREE=y
+CONFIG_FLASH=y
+CONFIG_MAIN_STACK_SIZE=20480
+CONFIG_BOOT_MAX_IMG_SECTORS=512
+CONFIG_SPI_NOR_FLASH_LAYOUT_PAGE_SIZE=4096
+# Ensure that the qspi driver is disabled by default
+CONFIG_NORDIC_QSPI_NOR=n
+
+CONFIG_MULTITHREADING=y
@@ -0,0 +1,48 @@
+/ {
+	chosen {
+		nordic,pm-ext-flash = &mx25r64;
+		zephyr,code-partition = &boot_partition;
+	};
+};
+
+/delete-node/ &boot_partition;
+/delete-node/ &slot0_partition;
+/delete-node/ &slot1_partition;
+
+/delete-node/ &storage_partition;
+
+&cpuapp_rram {
+	reg = < 0x0 DT_SIZE_K(1524) >;
+
+	partitions {
+		boot_partition: partition@0 {
+			label = "mcuboot";
+			reg = <0x000000000 0x00014000>;
+		};
+
+		slot0_partition: partition@14000 {
+			label = "image-0";
+			reg = <0x000014000 0x0015A000>;
+		};
+
+		storage_partition: partition@16E000 {
+			label = "storage";
+			reg = < 0x16E000 0x9000 >;
+		};
+	};
+};
+
+&mx25r64 {
+	status = "okay";
+
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		slot1_partition: partition@0 {
+			label = "image-1";
+			reg = <0x000000000 0x0015A000>;
+		};
+	};
+};