Cherry pick remove pm device runtime auto #3121
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…nrf54lm20dk Add overlay required to run the sample on nrf54lm20dk/nrf54lm20a/cpuapp. Signed-off-by: Sebastian Głąb <[email protected]> (cherry picked from commit 3c9368b)
… rename Remove duplicated test configuration after nrf54l20pdk/nrf54l20/cpuxxx was renamed to nrf54lm20dk/nrf54lm20a/cpuxxx. Signed-off-by: Sebastian Głąb <[email protected]> (cherry picked from commit 94d35ec)
…ow for nrf54* Remove duplicated test configuration after nrf54l20pdk/nrf54l20/cpuxxx was renamed to nrf54lm20dk/nrf54lm20a/cpuxxx. Extend platform_allow with other nrf54* targets (overlays for these targets already exist in the boards directory). Signed-off-by: Sebastian Głąb <[email protected]> (cherry picked from commit 589c85d)
…e/nucleo_h503rb Add nucleo_f401re and nucleo_h503rb boards to rtio_loopback tests on the I2C driver. Signed-off-by: Etienne Carriere <[email protected]> (cherry picked from commit f32cd93)
… nrf54lm20dk Add overlay required to run the sample on nrf54lm20dk/nrf54lm20a/cpuapp. Signed-off-by: Sebastian Głąb <[email protected]> (cherry picked from commit fc164f4)
Add overlay required to run the sample on nrf54lm20dk/nrf54lm20a/cpuapp. Signed-off-by: Sebastian Głąb <[email protected]> (cherry picked from commit c25e030)
Remove duplicated test configuration after nrf54l20pdk/nrf54l20/cpuxxx was renamed to nrf54lm20dk/nrf54lm20a/cpuxxx. Signed-off-by: Sebastian Głąb <[email protected]> (cherry picked from commit 537b1ef)
… targets Add overlays required to run the sample on - nrf54h20dk/nrf54h20/cpuapp, - nrf54l15dk/nrf54l15/cpuapp, - nrf54lm20dk/nrf54lm20a/cpuapp. Signed-off-by: Sebastian Głąb <[email protected]> (cherry picked from commit e314eb6)
Add overlay required to run the sample on nrf54lm20dk/nrf54lm20a/cpuapp. Signed-off-by: Sebastian Głąb <[email protected]> (cherry picked from commit 231b663)
…name Remove duplicated test configuration after nrf54l20pdk/nrf54l20/cpuxxx was renamed to nrf54lm20dk/nrf54lm20a/cpuxxx. Signed-off-by: Sebastian Głąb <[email protected]> (cherry picked from commit 3cf784c)
Add overlay required to run the sample on nrf54lm20dk/nrf54lm20a/cpuapp. Signed-off-by: Sebastian Głąb <[email protected]> (cherry picked from commit 9f0dc12)
Add overlay required to run the test on nrf54lm20dk/nrf54lm20a/cpuapp. Signed-off-by: Sebastian Głąb <[email protected]> (cherry picked from commit cd26bd7)
…name Remove duplicated test configuration after nrf54l20pdk/nrf54l20/cpuxxx was renamed to nrf54lm20dk/nrf54lm20a/cpuxxx. Signed-off-by: Sebastian Głąb <[email protected]> (cherry picked from commit 591ff81)
…4LM20 rename Remove duplicated test configuration after nrf54l20pdk/nrf54l20/cpuxxx was renamed to nrf54lm20dk/nrf54lm20a/cpuxxx. Signed-off-by: Sebastian Głąb <[email protected]> (cherry picked from commit 0272230)
Remove duplicated test configuration after nrf54l20pdk/nrf54l20/cpuxxx was renamed to nrf54lm20dk/nrf54lm20a/cpuxxx. Signed-off-by: Sebastian Głąb <[email protected]> (cherry picked from commit dcd1a14)
… nrf54lm20dk Add overlay required to run the test on nrf54lm20dk/nrf54lm20a/cpuapp. Signed-off-by: Sebastian Głąb <[email protected]> (cherry picked from commit cc3b92e)
…rename Remove duplicated test configuration after nrf54l20pdk/nrf54l20/cpuxxx was renamed to nrf54lm20dk/nrf54lm20a/cpuxxx. Signed-off-by: Sebastian Głąb <[email protected]> (cherry picked from commit d096e83)
…F54LM20 rename Remove duplicated test configuration after nrf54l20pdk/nrf54l20/cpuxxx was renamed to nrf54lm20dk/nrf54lm20a/cpuxxx. Signed-off-by: Sebastian Głąb <[email protected]> (cherry picked from commit 85f4925)
…20 rename Remove duplicated test configuration after nrf54l20pdk/nrf54l20/cpuxxx was renamed to nrf54lm20dk/nrf54lm20a/cpuxxx. Signed-off-by: Sebastian Głąb <[email protected]> (cherry picked from commit 6b70d35)
… driver Add analog comparator driver for ITE it51xxx chip. Signed-off-by: Yunshao Chiang <[email protected]> (cherry picked from commit 5a2765d)
…for ek_ra8p1 Add support test app `gpio_loopback` for Renesas ek_ra8p1 board Signed-off-by: Khoa Nguyen <[email protected]> (cherry picked from commit 3367bd4)
… on nrf54lm20dk Add overlay required to run the test on nrf54lm20dk/nrf54lm20a/cpuapp. Signed-off-by: Sebastian Głąb <[email protected]> (cherry picked from commit e8a5802)
…ter nRF54LM20 rename Remove duplicated test configuration after nrf54l20pdk/nrf54l20/cpuxxx was renamed to nrf54lm20dk/nrf54lm20a/cpuxxx. Signed-off-by: Sebastian Głąb <[email protected]> (cherry picked from commit e275eea)
…s OSPI_B Add support test app "flash/common" for testing Renesas RA OSPI_B on ek_ra8m1, ek_ra8d1 Signed-off-by: Khoa Nguyen <[email protected]> (cherry picked from commit a545e19)
…rase is required When no flash device requires erase, this test does not retrieve flash page size with flash_get_page_info_by_offs(), but instead it takes an arbitrary page size based on the test area length. Since the test_flash_copy routine needs to use two pages, the test area needs to be split into at least two parts. Correct the related code and add a check if test_flash_copy requirements are met. Signed-off-by: Andrzej Głąbek <[email protected]> (cherry picked from commit fb94343)
… rename Remove duplicated test configuration after nrf54l20pdk/nrf54l20/cpuxxx was renamed to nrf54lm20dk/nrf54lm20a/cpuxxx. Enable external memory node. Use separate test configuration as external memory works only on nRF54LM20 DKs with `external_flash` fixture. Signed-off-by: Sebastian Głąb <[email protected]> (cherry picked from commit 6d03831)
…RF54LM20 rename Remove duplicated test configuration after nrf54l20pdk/nrf54l20/cpuxxx was renamed to nrf54lm20dk/nrf54lm20a/cpuxxx. Signed-off-by: Sebastian Głąb <[email protected]> (cherry picked from commit dd932f2)
…F54LM20 rename Remove duplicated test configuration after nrf54l20pdk/nrf54l20/cpuxxx was renamed to nrf54lm20dk/nrf54lm20a/cpuxxx. Signed-off-by: Sebastian Głąb <[email protected]> (cherry picked from commit 942e2a8)
…54LM20 rename Remove duplicated test configuration after nrf54l20pdk/nrf54l20/cpuxxx was renamed to nrf54lm20dk/nrf54lm20a/cpuxxx. Signed-off-by: Sebastian Głąb <[email protected]> (cherry picked from commit 9a8988d)
…f54lm20dk Add overlay required to run the test on nrf54lm20dk/nrf54lm20a/cpuapp. Signed-off-by: Sebastian Głąb <[email protected]> (cherry picked from commit a850089)
…variants This replaces the legacy SDFW compatible board configuration with the IronSide SE compatible one, thus removing support for running samples and tests on nRF54H20 devices with the old firmware. All applications are expected to work on `nrf54h20dk/nrf54h20/cpuapp` out of the box. For other board targets, all applications are expected to boot, but may require additional peripheral configuration in UICR. Build system support for the new UICR format is to be added separately. Co-authored-by: Jonathan Nilsen <[email protected]> Signed-off-by: Jonathan Nilsen <[email protected]> Signed-off-by: Grzegorz Swiderski <[email protected]> (cherry picked from commit b4c18e8)
CONFIG_USE_DT_CODE_PARTITION had to be disabled to add MCUboot support. As a result, CONFIG_FLASH_LOAD_SIZE was left at zero, which means that the linker would claim all available MRAM for the app core. For now, we can't allow that, because the default nRF54H20 DK memory map divides MRAM between multiple cores in order to support various samples. Signed-off-by: Grzegorz Swiderski <[email protected]> (cherry picked from commit b7b8b27)
…F54H nrf-regtool will not be used as part of IronSide SE compatible builds. It will remain in use for the nRF92 series, until that too undergoes a switch from SDFW to IronSide SE. Signed-off-by: Grzegorz Swiderski <[email protected]> (cherry picked from commit 835649a)
Update memory map to be compatible with latest IronSide. 180kB MRAM is reserved. Co-authored-by: Håkon Amundsen <[email protected]> Signed-off-by: Håkon Amundsen <[email protected]> Signed-off-by: Jonathan Nilsen <[email protected]> (cherry picked from commit 7324eea)
Refactor the default RAM memory map on nrf54h20dk: Removes use of "nordic,owned-memory" which is no longer needed on nrf54h20. Reserved memory nodes that were under "nordic,owned-memory" have been moved directly under reserved-memory. The memory shared between cpuapp-cpusec and cpurad-cpusec in RAM0x is no longer used with IronSide, since IPC buffers toward the secure domain are at new fixed locations. The cpuapp_data region has been expanded to fill the available space in RAM0x when removing these shared memory regions. Signed-off-by: Jonathan Nilsen <[email protected]> (cherry picked from commit 38e6002)
With IronSide SE there is only one defined UICR which is at the location of the APPLICATION UICR. Update the devicetree definition accordingly, and use the "nordic,nrf-uicr" compatible on the node since the domain distinction added by the v2 compatible is no longer relevant. Signed-off-by: Jonathan Nilsen <[email protected]> (cherry picked from commit b43ae17)
Add support for generating UICR and associated artifacts in a format compatible with IronSide SE, to be used for Nordic SoCs in the Haltium family. The main feature added with this is the ability to configure certain global domain peripherals that are managed by the secure domain through setting UICR.PERIPHCONF. This register points at a blob of (register address, register value) pairs which are loaded into the peripherals by IronSide SE ahead of the application boot. The added helper macros in uicr.h can be used to add register configurations to the PERIPHCONF. Entries added through these macros are then extracted by a script, post-processed and placed in a blob located at specific part of MRAM. A default PERIPHCONF configuration has been added for the nrf54h20 soc to support the standard BLE use case (matching the configuration in the soc devicetree). Signed-off-by: Jonathan Nilsen <[email protected]> (cherry picked from commit 56b6e57)
…if present Program the new UICR and PERIPHCONF artifacts if they are generated. These are required for the application to operate properly if they are in use. Signed-off-by: Jonathan Nilsen <[email protected]> (cherry picked from commit eb7239c)
Update the recover mechanism for nrf54h to only call recover once. Using nrfutil device recover with both --core Network and --core Application is redundant with IronSide SE as both of these map to the same operation which does a full erase of the device MRAM. Additionally, recovering twice in a row specifically in a nrfutil batch file (which is used by this runner implementation) triggers some odd behavior with the current latest version of nrfutil device + IronSide SE, which can cause the device to enter a reset loop and appear unresponsive and preventing 'west flash --recover' from working properly. Signed-off-by: Jonathan Nilsen <[email protected]> (cherry picked from commit 78a6157)
…rammed Booting the radio core when it is not programmed will typically cause a reset loop. This can happen when programming multiple images to a device, and the app core image is programmed before the radio core. With this change we avoid the reset loop in that case. Signed-off-by: Håkon Amundsen <[email protected]> (cherry picked from commit 7697eff)
Fixes generating a library for devices that do not need it which gives a cmake warning Signed-off-by: Jamie McCrae <[email protected]> (cherry picked from commit 85d4ebc)
Upstream PR #: 92340 Added support for the IronSide TDD service which allows configuring and powering the trace and debug domain of the nrf54h20. Also provide option to start the trace and debug domain in the soc start sequence. Signed-off-by: Karsten Koenig <[email protected]>
Upstream PR #: 92340 Configure the CTRLSEL value and the clock pin so that the TRACE pins work when the TDD gets used. Signed-off-by: Karsten Koenig <[email protected]>
Upstream PR #: 92340 Added support for ETM tracing via TPIU to the JLinkScript. Signed-off-by: Karsten Koenig <[email protected]>
Upstream PR #: 93768 Format a few files with clang-format. Signed-off-by: Jonathan Nilsen <[email protected]>
…rable Although the value currently hard-coded in the driver (10 ms) is quite high, it may turn out to be insufficient when there is a need to use some very low SCK frequency, like 250 kHz. Make the timeout value configurable per-instance, via devicetree. Signed-off-by: Andrzej Głąbek <[email protected]> (cherry picked from commit 7efa5c8)
Get parameters for used flash commands and requirements for enabling Quad and Octal modes from dts uint8-arrays containing data read from SFDP tables for particular flash chips. Upstream PR #: 93093 Signed-off-by: Andrzej Głąbek <[email protected]>
- Use standard operation codes and parameters from SFDP for handling the used flash commands (allow to override some of them through dts with the `read-command`, `write-command`, and `rx-dummy` properties) - Use all available erase types as specified by SFDP - Allow using all IO modes - Add support for switching to 4-byte addressing mode - Use common functions for reading and writing of status registers and for enabling write operations - Switch IO mode (between the target one and Single IO) in a common function that performs transfers and do it only when required for a given command Upstream PR #: 93093 Signed-off-by: Andrzej Głąbek <[email protected]>
… handling of OER Complete implementation of quad_enable_set() by adding support for all possible Quad Enable Requirements (QER) as specified by the SFDP JEDEC standard (JESD216). Add also corresponding octal_enable_set() to handle Octal Enable Requirements. Also remove initial waiting from mxicy_mx25r_post_switch_mode() which became unneeded, as now such waiting is done in cmd_wrsr() which is called at the end of quad_enable_set(). Upstream PR #: 93093 Signed-off-by: Andrzej Głąbek <[email protected]>
Add implementation of the most common Soft Reset routine (sequence of reset enable instruction 0x66 and reset instruction 0x99). Upstream PR #: 93093 Signed-off-by: Andrzej Głąbek <[email protected]>
…ad disabling Using a GPIO reset for a flash chip that has a dual function pin (RESET# or SIO3) and is to be used in Quad mode is rather a bad idea and so is clearing of the Quad Enable bit at every initialization of the flash driver, since this bit is usually non-volatile, so such operation means unnecessary wearing of the flash chip. Soft Reset should be use instead in such case. Upstream PR #: 93093 Signed-off-by: Andrzej Głąbek <[email protected]>
…" property Add support for supplying power to the flash chip by activation of a GPIO specified through the "supply-gpios" property. Implementation of gpio_reset() is also slightly modified so that it is consistent with soft_reset() and the new power_supply() and so that all these functions can use a common routine that performs a reset recovery delay. Upstream PR #: 93093 Signed-off-by: Andrzej Głąbek <[email protected]>
Many SoCs which use PM_DEVICE_RUNTIME need every device in the system to have PM_DEVICE_RUNTIME enabled to function. Currently, this is only possible by adding zephyr,pm-device-runtime-auto; to every node in every devicetree which could potentially implement device power management. This is very error prone since its easy to miss a node, especially if users apply overlays, where users need to know and remember to apply or reapply this property. This commit adds a Kconfig, disabled by default, which automatically treats every device as if it had the zephyr,pm-device-runtime-auto property added to every node. Upstream PR #: 93720 Signed-off-by: Bjarki Arge Andreasen <[email protected]>
…NABLE for all Enable CONFIG_PM_DEVICE_RUNTIME_DEFAULT_ENABLE by default for all nordic SoCs if CONFIG_PM_DEVICE_RUNTIME is used. This will ensure consistent behavior across all nordic SoCs and remove the need for pasting the devicetree propert zephyr,pm-device-runtime-auto everywhere. Upstream PR #: 93720 Signed-off-by: Bjarki Arge Andreasen <[email protected]>
nordic-piks
requested review from
kl-cruz,
nordic-krch,
nika-nordic and
adamkondraciuk
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Cherry pick remove pm device runtime auto