Add rv32IMC Imperas Configuration for Lockstep

[jordancarlin]

Currently fails several tests in lockstep due to problems explained in #1315, but this should be good to merge as is.

Also adds coverage config file for rv32imc

[davidharrishmc]

There is no reason for a microcontroller to have S mode without VM. Table A1. calls rv32imc MU, but table A.3 has a 1 in S mode for rv32imc. I’ll change table 3. In coverage.svh, please drop the S coverage. In config.vh, please remove S.
Zifencei is a nop in systems without caches, and there’s no way to synchronize an IROM with a DTIM. Let’s change ZifenceI to 0 in config.vh for rv32imc and strike it from coverage.svh.
In imperas.ic
Disable supervisor mode.
Why do we set wfi_is_nop in all our config files? We really do wait.

[jordancarlin]

Disabled S and Zifencei for rv32imc config of Wally. The wally32periph suite now fails. We need to either drop it from the rv32imc tests or modify it to work without supervisor mode. @davidharrishmc opinions on this?

[davidharrishmc]

I don’t recall why 32periph fails without supervisor. Maybe plic is making seip? Perhaps there is one test we could pull out? It would be good to keep most of period on 32imc to keep it working as a microcontroller.

…

On Tue, Mar 18, 2025 at 8:40 PM Jordan Carlin ***@***.***> wrote: Disabled S and Zifencei for rv32imc config of Wally. The wally32periph suite now fails. We need to either drop it from the rv32imc tests or modify it to work without supervisor mode. @davidharrishmc <https://github.com/davidharrishmc> opinions on this? — Reply to this email directly, view it on GitHub <#1316 (comment)>, or unsubscribe <https://github.com/notifications/unsubscribe-auth/AR4AA35SDJJXVGUXMCHKT5T2VDRKFAVCNFSM6AAAAABY5QZ3IKVHI2DSMVQWIX3LMV43OSLTON2WKQ3PNVWWK3TUHMZDOMZVGI2DAOBTGA> . You are receiving this because you were mentioned.Message ID: ***@***.***> [image: jordancarlin]*jordancarlin* left a comment (openhwgroup/cvw#1316) <#1316 (comment)> Disabled S and Zifencei for rv32imc config of Wally. The wally32periph suite now fails. We need to either drop it from the rv32imc tests or modify it to work without supervisor mode. @davidharrishmc <https://github.com/davidharrishmc> opinions on this? — Reply to this email directly, view it on GitHub <#1316 (comment)>, or unsubscribe <https://github.com/notifications/unsubscribe-auth/AR4AA35SDJJXVGUXMCHKT5T2VDRKFAVCNFSM6AAAAABY5QZ3IKVHI2DSMVQWIX3LMV43OSLTON2WKQ3PNVWWK3TUHMZDOMZVGI2DAOBTGA> . You are receiving this because you were mentioned.Message ID: ***@***.***>

[jordancarlin]

Most of the periph tests are already pulled out. gpio, clint, uart, plic, plic-s, and spi are all part of wally32priv instead of wally32periph because they apparently don't work on rv32imc because of the lack of pmp. The only test in the wally32periph suite is WALLY-periph-01.S itself.

[jordancarlin]

Looks like it is a similar issue to openhwgroup/cvw-arch-verif#531. WALLY-periph-01.S does a csrrc to mideleg, which doesn't exist without S-mode. The trap handler then proceeds normally but returns to the same instruction that trapped, which of course immediately traps again.

[davidharrishmc]

Perhaps we could pull PMP and m*deleg out of WALLY-init-lib. Unfortunately, mideleg is unspecified on reset, so to do this right, we might need to attempt to clear it and possibly trap. Maybe that could be done after the trap vector is set up. PMP is supposed to be disabled on reset, if I recall correctly.

However, functional verification and superscalar are more important. It would be fine to create an issue and merge this PR without the periph tests.

[jordancarlin]

wally32periph test removed for now (see #1321). There are still issues with some of the functional coverage tests, but those likely require changes in cvw-arch-verif. This should be ready to merge for an initial rv32imc lockstep implementation.