Skip to content

Minor build fixes #1046

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 3 commits into from
May 28, 2025
Merged

Minor build fixes #1046

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
3 commits
Select commit Hold shift + click to select a range
bac5ada
ACVP: Allow parameters in `EXEC_WRAPPER` environment variable
hanno-becker May 28, 2025
5c3414f
Makefiles: Simplify auto-derivation of compiler flags
hanno-becker May 28, 2025
ad9bff9
Neon NTT reference: switch from tches to eprint url.
mkannwischer May 28, 2025
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
2 changes: 1 addition & 1 deletion BIBLIOGRAPHY.md
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -157,7 +157,7 @@ source code and documentation.
- Matthias J. Kannwischer
- Bo-Yin Yang
- Shang-Yi Yang
* URL: https://tches.iacr.org/index.php/TCHES/article/view/9295
* URL: https://eprint.iacr.org/2021/986
* Referenced from:
- [dev/aarch64_clean/README.md](dev/aarch64_clean/README.md)
- [dev/aarch64_clean/src/intt.S](dev/aarch64_clean/src/intt.S)
Expand Down
2 changes: 1 addition & 1 deletion BIBLIOGRAPHY.yml
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -102,7 +102,7 @@
- id: NeonNTT
name: "Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1"
year: 2022
url: https://tches.iacr.org/index.php/TCHES/article/view/9295
url: https://eprint.iacr.org/2021/986
author:
- Becker, Hanno
- Hwang, Vincent
Expand Down
2 changes: 1 addition & 1 deletion dev/aarch64_clean/README.md
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -13,5 +13,5 @@ target architecture is Cortex-A55, but you can easily re-optimize the code for a
by SLOTHY, by adjusting the parameters in the [Makefile](../aarch64_opt/src/Makefile).

<!--- bibliography --->
[^NeonNTT]: Becker, Hwang, Kannwischer, Yang, Yang: Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1, [https://tches.iacr.org/index.php/TCHES/article/view/9295](https://tches.iacr.org/index.php/TCHES/article/view/9295)
[^NeonNTT]: Becker, Hwang, Kannwischer, Yang, Yang: Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1, [https://eprint.iacr.org/2021/986](https://eprint.iacr.org/2021/986)
[^SLOTHY_Paper]: Abdulrahman, Becker, Kannwischer, Klein: Fast and Clean: Auditable high-performance assembly via constraint solving, [https://eprint.iacr.org/2022/1303](https://eprint.iacr.org/2022/1303)
2 changes: 1 addition & 1 deletion dev/aarch64_clean/src/intt.S
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -29,7 +29,7 @@
* - [NeonNTT]
* Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1
* Becker, Hwang, Kannwischer, Yang, Yang
* https://tches.iacr.org/index.php/TCHES/article/view/9295
* https://eprint.iacr.org/2021/986
*
* - [SLOTHY_Paper]
* Fast and Clean: Auditable high-performance assembly via constraint solving
Expand Down
2 changes: 1 addition & 1 deletion dev/aarch64_clean/src/ntt.S
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -29,7 +29,7 @@
* - [NeonNTT]
* Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1
* Becker, Hwang, Kannwischer, Yang, Yang
* https://tches.iacr.org/index.php/TCHES/article/view/9295
* https://eprint.iacr.org/2021/986
*
* - [SLOTHY_Paper]
* Fast and Clean: Auditable high-performance assembly via constraint solving
Expand Down
2 changes: 1 addition & 1 deletion dev/aarch64_clean/src/polyvec_basemul_acc_montgomery_cached_asm_k2.S
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -9,7 +9,7 @@
* - [NeonNTT]
* Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1
* Becker, Hwang, Kannwischer, Yang, Yang
* https://tches.iacr.org/index.php/TCHES/article/view/9295
* https://eprint.iacr.org/2021/986
*/

/* Re-implementation of asymmetric base multiplication following @[NeonNTT] */
Expand Down
2 changes: 1 addition & 1 deletion dev/aarch64_clean/src/polyvec_basemul_acc_montgomery_cached_asm_k3.S
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -9,7 +9,7 @@
* - [NeonNTT]
* Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1
* Becker, Hwang, Kannwischer, Yang, Yang
* https://tches.iacr.org/index.php/TCHES/article/view/9295
* https://eprint.iacr.org/2021/986
*/

/* Re-implementation of asymmetric base multiplication following @[NeonNTT] */
Expand Down
2 changes: 1 addition & 1 deletion dev/aarch64_clean/src/polyvec_basemul_acc_montgomery_cached_asm_k4.S
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -9,7 +9,7 @@
* - [NeonNTT]
* Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1
* Becker, Hwang, Kannwischer, Yang, Yang
* https://tches.iacr.org/index.php/TCHES/article/view/9295
* https://eprint.iacr.org/2021/986
*/

/* Re-implementation of asymmetric base multiplication following @[NeonNTT] */
Expand Down
2 changes: 1 addition & 1 deletion dev/aarch64_opt/README.md
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -11,5 +11,5 @@ target architecture is Cortex-A55, but you can easily re-optimize the code for a
by SLOTHY, by adjusting the parameters in the [Makefile](src/Makefile).

<!--- bibliography --->
[^NeonNTT]: Becker, Hwang, Kannwischer, Yang, Yang: Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1, [https://tches.iacr.org/index.php/TCHES/article/view/9295](https://tches.iacr.org/index.php/TCHES/article/view/9295)
[^NeonNTT]: Becker, Hwang, Kannwischer, Yang, Yang: Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1, [https://eprint.iacr.org/2021/986](https://eprint.iacr.org/2021/986)
[^SLOTHY_Paper]: Abdulrahman, Becker, Kannwischer, Klein: Fast and Clean: Auditable high-performance assembly via constraint solving, [https://eprint.iacr.org/2022/1303](https://eprint.iacr.org/2022/1303)
2 changes: 1 addition & 1 deletion dev/aarch64_opt/src/intt.S
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -29,7 +29,7 @@
* - [NeonNTT]
* Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1
* Becker, Hwang, Kannwischer, Yang, Yang
* https://tches.iacr.org/index.php/TCHES/article/view/9295
* https://eprint.iacr.org/2021/986
*
* - [SLOTHY_Paper]
* Fast and Clean: Auditable high-performance assembly via constraint solving
Expand Down
2 changes: 1 addition & 1 deletion dev/aarch64_opt/src/ntt.S
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -29,7 +29,7 @@
* - [NeonNTT]
* Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1
* Becker, Hwang, Kannwischer, Yang, Yang
* https://tches.iacr.org/index.php/TCHES/article/view/9295
* https://eprint.iacr.org/2021/986
*
* - [SLOTHY_Paper]
* Fast and Clean: Auditable high-performance assembly via constraint solving
Expand Down
2 changes: 1 addition & 1 deletion dev/aarch64_opt/src/polyvec_basemul_acc_montgomery_cached_asm_k2.S
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -9,7 +9,7 @@
* - [NeonNTT]
* Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1
* Becker, Hwang, Kannwischer, Yang, Yang
* https://tches.iacr.org/index.php/TCHES/article/view/9295
* https://eprint.iacr.org/2021/986
*/

/* Re-implementation of asymmetric base multiplication following @[NeonNTT] */
Expand Down
2 changes: 1 addition & 1 deletion dev/aarch64_opt/src/polyvec_basemul_acc_montgomery_cached_asm_k3.S
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -9,7 +9,7 @@
* - [NeonNTT]
* Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1
* Becker, Hwang, Kannwischer, Yang, Yang
* https://tches.iacr.org/index.php/TCHES/article/view/9295
* https://eprint.iacr.org/2021/986
*/

/* Re-implementation of asymmetric base multiplication following @[NeonNTT] */
Expand Down
2 changes: 1 addition & 1 deletion dev/aarch64_opt/src/polyvec_basemul_acc_montgomery_cached_asm_k4.S
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -9,7 +9,7 @@
* - [NeonNTT]
* Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1
* Becker, Hwang, Kannwischer, Yang, Yang
* https://tches.iacr.org/index.php/TCHES/article/view/9295
* https://eprint.iacr.org/2021/986
*/

/* Re-implementation of asymmetric base multiplication following @[NeonNTT] */
Expand Down
30 changes: 14 additions & 16 deletions examples/monolithic_build_multilevel_native/Makefile
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -52,36 +52,34 @@ BIN=test_binary

# Automatically detect system architecture and set preprocessor etc accordingly
HOST_PLATFORM := $(shell uname -s)-$(shell uname -m)

# linux x86_64
ifeq ($(HOST_PLATFORM),Linux-x86_64)
CFLAGS += -z noexecstack
endif

ifeq ($(HOST_PLATFORM),Linux-x86_64)
# Native compilation
ifeq ($(CROSS_PREFIX),)
ifeq ($(HOST_PLATFORM),Linux-x86_64)
CFLAGS += -mavx2 -mbmi2 -mpopcnt -maes
CFLAGS += -DMLK_FORCE_X86_64
else ifneq ($(findstring aarch64_be, $(CROSS_PREFIX)),)
CFLAGS += -DMLK_FORCE_AARCH64_EB
else ifneq ($(findstring aarch64, $(CROSS_PREFIX)),)
CFLAGS += -DMLK_FORCE_AARCH64
else

endif

# linux aarch64
else ifeq ($(HOST_PLATFORM),Linux-aarch64)
ifeq ($(CROSS_PREFIX),)
CFLAGS += -DMLK_FORCE_AARCH64
else ifeq ($(HOST_PLATFORM),Darwin-arm64)
CFLAGS += -DMLK_FORCE_AARCH64
endif
# Cross compilation
else ifneq ($(findstring x86_64, $(CROSS_PREFIX)),)
CFLAGS += -mavx2 -mbmi2 -mpopcnt -maes
CFLAGS += -DMLK_FORCE_X86_64
else
endif

# darwin aarch64
else ifeq ($(HOST_PLATFORM),Darwin-arm64)
else ifneq ($(findstring aarch64_be, $(CROSS_PREFIX)),)
CFLAGS += -DMLK_FORCE_AARCH64_EB
else ifneq ($(findstring aarch64, $(CROSS_PREFIX)),)
CFLAGS += -DMLK_FORCE_AARCH64
else ifneq ($(findstring riscv64, $(CROSS_PREFIX)),)
CFLAGS += -DMLK_FORCE_RISCV64
else ifneq ($(findstring powerpc64le, $(CROSS_PREFIX)),)
CFLAGS += -DMLK_FORCE_PPC64LE
endif

CFLAGS := \
Expand Down
30 changes: 14 additions & 16 deletions examples/multilevel_build_native/Makefile
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -14,36 +14,34 @@ endif

# Automatically detect system architecture and set preprocessor etc accordingly
HOST_PLATFORM := $(shell uname -s)-$(shell uname -m)

# linux x86_64
ifeq ($(HOST_PLATFORM),Linux-x86_64)
CFLAGS += -z noexecstack
endif

ifeq ($(HOST_PLATFORM),Linux-x86_64)
# Native compilation
ifeq ($(CROSS_PREFIX),)
ifeq ($(HOST_PLATFORM),Linux-x86_64)
CFLAGS += -mavx2 -mbmi2 -mpopcnt -maes
CFLAGS += -DMLK_FORCE_X86_64
else ifneq ($(findstring aarch64_be, $(CROSS_PREFIX)),)
CFLAGS += -DMLK_FORCE_AARCH64_EB
else ifneq ($(findstring aarch64, $(CROSS_PREFIX)),)
CFLAGS += -DMLK_FORCE_AARCH64
else

endif

# linux aarch64
else ifeq ($(HOST_PLATFORM),Linux-aarch64)
ifeq ($(CROSS_PREFIX),)
CFLAGS += -DMLK_FORCE_AARCH64
else ifeq ($(HOST_PLATFORM),Darwin-arm64)
CFLAGS += -DMLK_FORCE_AARCH64
endif
# Cross compilation
else ifneq ($(findstring x86_64, $(CROSS_PREFIX)),)
CFLAGS += -mavx2 -mbmi2 -mpopcnt -maes
CFLAGS += -DMLK_FORCE_X86_64
else
endif

# darwin aarch64
else ifeq ($(HOST_PLATFORM),Darwin-arm64)
else ifneq ($(findstring aarch64_be, $(CROSS_PREFIX)),)
CFLAGS += -DMLK_FORCE_AARCH64_EB
else ifneq ($(findstring aarch64, $(CROSS_PREFIX)),)
CFLAGS += -DMLK_FORCE_AARCH64
else ifneq ($(findstring riscv64, $(CROSS_PREFIX)),)
CFLAGS += -DMLK_FORCE_RISCV64
else ifneq ($(findstring powerpc64le, $(CROSS_PREFIX)),)
CFLAGS += -DMLK_FORCE_PPC64LE
endif

CFLAGS := \
Expand Down
2 changes: 1 addition & 1 deletion mlkem/native/aarch64/README.md
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -12,5 +12,5 @@ and most preprocessor directives by [`scripts/simpasm`](../../../scripts/simpasm
If you want to understand how the assembly works, and/or make changes to it, consult [dev/](../../../dev).

<!--- bibliography --->
[^NeonNTT]: Becker, Hwang, Kannwischer, Yang, Yang: Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1, [https://tches.iacr.org/index.php/TCHES/article/view/9295](https://tches.iacr.org/index.php/TCHES/article/view/9295)
[^NeonNTT]: Becker, Hwang, Kannwischer, Yang, Yang: Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1, [https://eprint.iacr.org/2021/986](https://eprint.iacr.org/2021/986)
[^SLOTHY_Paper]: Abdulrahman, Becker, Kannwischer, Klein: Fast and Clean: Auditable high-performance assembly via constraint solving, [https://eprint.iacr.org/2022/1303](https://eprint.iacr.org/2022/1303)
2 changes: 1 addition & 1 deletion mlkem/native/aarch64/src/intt.S
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -29,7 +29,7 @@
* - [NeonNTT]
* Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1
* Becker, Hwang, Kannwischer, Yang, Yang
* https://tches.iacr.org/index.php/TCHES/article/view/9295
* https://eprint.iacr.org/2021/986
*
* - [SLOTHY_Paper]
* Fast and Clean: Auditable high-performance assembly via constraint solving
Expand Down
2 changes: 1 addition & 1 deletion mlkem/native/aarch64/src/ntt.S
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -29,7 +29,7 @@
* - [NeonNTT]
* Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1
* Becker, Hwang, Kannwischer, Yang, Yang
* https://tches.iacr.org/index.php/TCHES/article/view/9295
* https://eprint.iacr.org/2021/986
*
* - [SLOTHY_Paper]
* Fast and Clean: Auditable high-performance assembly via constraint solving
Expand Down
2 changes: 1 addition & 1 deletion mlkem/native/aarch64/src/polyvec_basemul_acc_montgomery_cached_asm_k2.S
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -9,7 +9,7 @@
* - [NeonNTT]
* Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1
* Becker, Hwang, Kannwischer, Yang, Yang
* https://tches.iacr.org/index.php/TCHES/article/view/9295
* https://eprint.iacr.org/2021/986
*/

/* Re-implementation of asymmetric base multiplication following @[NeonNTT] */
Expand Down
2 changes: 1 addition & 1 deletion mlkem/native/aarch64/src/polyvec_basemul_acc_montgomery_cached_asm_k3.S
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -9,7 +9,7 @@
* - [NeonNTT]
* Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1
* Becker, Hwang, Kannwischer, Yang, Yang
* https://tches.iacr.org/index.php/TCHES/article/view/9295
* https://eprint.iacr.org/2021/986
*/

/* Re-implementation of asymmetric base multiplication following @[NeonNTT] */
Expand Down
2 changes: 1 addition & 1 deletion mlkem/native/aarch64/src/polyvec_basemul_acc_montgomery_cached_asm_k4.S
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -9,7 +9,7 @@
* - [NeonNTT]
* Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1
* Becker, Hwang, Kannwischer, Yang, Yang
* https://tches.iacr.org/index.php/TCHES/article/view/9295
* https://eprint.iacr.org/2021/986
*/

/* Re-implementation of asymmetric base multiplication following @[NeonNTT] */
Expand Down
2 changes: 1 addition & 1 deletion mlkem/poly.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -9,7 +9,7 @@
* - [NeonNTT]
* Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1
* Becker, Hwang, Kannwischer, Yang, Yang
* https://tches.iacr.org/index.php/TCHES/article/view/9295
* https://eprint.iacr.org/2021/986
*
* - [REF]
* CRYSTALS-Kyber C reference implementation
Expand Down
2 changes: 1 addition & 1 deletion mlkem/poly_k.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -14,7 +14,7 @@
* - [NeonNTT]
* Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1
* Becker, Hwang, Kannwischer, Yang, Yang
* https://tches.iacr.org/index.php/TCHES/article/view/9295
* https://eprint.iacr.org/2021/986
*
* - [REF]
* CRYSTALS-Kyber C reference implementation
Expand Down
2 changes: 1 addition & 1 deletion proofs/hol_light/arm/mlkem/mlkem_intt.S
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -29,7 +29,7 @@
* - [NeonNTT]
* Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1
* Becker, Hwang, Kannwischer, Yang, Yang
* https://tches.iacr.org/index.php/TCHES/article/view/9295
* https://eprint.iacr.org/2021/986
*
* - [SLOTHY_Paper]
* Fast and Clean: Auditable high-performance assembly via constraint solving
Expand Down
2 changes: 1 addition & 1 deletion proofs/hol_light/arm/mlkem/mlkem_ntt.S
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -29,7 +29,7 @@
* - [NeonNTT]
* Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1
* Becker, Hwang, Kannwischer, Yang, Yang
* https://tches.iacr.org/index.php/TCHES/article/view/9295
* https://eprint.iacr.org/2021/986
*
* - [SLOTHY_Paper]
* Fast and Clean: Auditable high-performance assembly via constraint solving
Expand Down
2 changes: 1 addition & 1 deletion proofs/hol_light/arm/mlkem/mlkem_poly_basemul_acc_montgomery_cached_k2.S
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -9,7 +9,7 @@
* - [NeonNTT]
* Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1
* Becker, Hwang, Kannwischer, Yang, Yang
* https://tches.iacr.org/index.php/TCHES/article/view/9295
* https://eprint.iacr.org/2021/986
*/

/* Re-implementation of asymmetric base multiplication following @[NeonNTT] */
Expand Down
2 changes: 1 addition & 1 deletion proofs/hol_light/arm/mlkem/mlkem_poly_basemul_acc_montgomery_cached_k3.S
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -9,7 +9,7 @@
* - [NeonNTT]
* Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1
* Becker, Hwang, Kannwischer, Yang, Yang
* https://tches.iacr.org/index.php/TCHES/article/view/9295
* https://eprint.iacr.org/2021/986
*/

/* Re-implementation of asymmetric base multiplication following @[NeonNTT] */
Expand Down
2 changes: 1 addition & 1 deletion proofs/hol_light/arm/mlkem/mlkem_poly_basemul_acc_montgomery_cached_k4.S
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -9,7 +9,7 @@
* - [NeonNTT]
* Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1
* Becker, Hwang, Kannwischer, Yang, Yang
* https://tches.iacr.org/index.php/TCHES/article/view/9295
* https://eprint.iacr.org/2021/986
*/

/* Re-implementation of asymmetric base multiplication following @[NeonNTT] */
Expand Down
2 changes: 1 addition & 1 deletion test/acvp_client.py
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -15,7 +15,7 @@

# Check if we need to use a wrapper for execution (e.g. QEMU)
exec_prefix = os.environ.get("EXEC_WRAPPER", "")
exec_prefix = [exec_prefix] if exec_prefix != "" else []
exec_prefix = exec_prefix.split(" ") if exec_prefix != "" else []

acvp_dir = "test/acvp_data"
acvp_keygen_jsons = [
Expand Down
33 changes: 12 additions & 21 deletions test/mk/auto.mk
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,36 +1,27 @@
# SPDX-License-Identifier: Apache-2.0 OR ISC OR MIT
#
# Automatically detect system architecture and set preprocessor etc accordingly
ifeq ($(HOST_PLATFORM),Linux-x86_64)

# Native compilation
ifeq ($(CROSS_PREFIX),)
ifeq ($(HOST_PLATFORM),Linux-x86_64)
CFLAGS += -mavx2 -mbmi2 -mpopcnt -maes
CFLAGS += -DMLK_FORCE_X86_64
else ifneq ($(findstring aarch64_be, $(CROSS_PREFIX)),)
CFLAGS += -DMLK_FORCE_AARCH64_EB
else ifneq ($(findstring aarch64, $(CROSS_PREFIX)),)
CFLAGS += -DMLK_FORCE_AARCH64
else

endif

# linux aarch64
else ifeq ($(HOST_PLATFORM),Linux-aarch64)
ifeq ($(CROSS_PREFIX),)
CFLAGS += -DMLK_FORCE_AARCH64
else ifneq ($(findstring x86_64, $(CROSS_PREFIX)),)
CFLAGS += -mavx2 -mbmi2 -mpopcnt -maes
CFLAGS += -DMLK_FORCE_X86_64
else
endif

# darwin aarch64
else ifeq ($(HOST_PLATFORM),Darwin-arm64)
ifeq ($(CROSS_PREFIX),)
CFLAGS += -DMLK_FORCE_AARCH64
endif
# Cross compilation
else ifneq ($(findstring x86_64, $(CROSS_PREFIX)),)
CFLAGS += -mavx2 -mbmi2 -mpopcnt -maes
CFLAGS += -DMLK_FORCE_X86_64
else ifneq ($(findstring aarch64_be, $(CROSS_PREFIX)),)
CFLAGS += -DMLK_FORCE_AARCH64_EB
else ifneq ($(findstring aarch64, $(CROSS_PREFIX)),)
CFLAGS += -DMLK_FORCE_AARCH64
else
endif
else ifneq ($(findstring riscv64, $(CROSS_PREFIX)),)
CFLAGS += -DMLK_FORCE_RISCV64
else ifneq ($(findstring powerpc64le, $(CROSS_PREFIX)),)
CFLAGS += -DMLK_FORCE_PPC64LE
endif
Loading