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Qualcomm AI Engine Direct - Support more SoC model #6954

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3 changes: 3 additions & 0 deletions backends/qualcomm/serialization/qc_compiler_spec.fbs
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Original file line number Diff line number Diff line change
Expand Up @@ -17,6 +17,7 @@ enum HtpArch: int {
V69 = 69,
V73 = 73,
V75 = 75,
V79 = 79,
}

table HtpInfo {
Expand All @@ -35,8 +36,10 @@ enum QcomChipset: int {
SM8475 = 42,
SM8550 = 43,
SSG2115P = 46,
SM8635 = 68,
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@cccclai cccclai Dec 5, 2024

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Unrelated - we may need to figure out how to make it non BC breaking. I remember extending in flatbuffers won't be BC breacking, but it'll a bit annoying if it's not ordered...

SM8650 = 57,
SA8295 = 39,
SM8750 = 69,
}

/// Indicate the information of the specified SoC.
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5 changes: 5 additions & 0 deletions backends/qualcomm/serialization/qc_schema.py
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Original file line number Diff line number Diff line change
Expand Up @@ -25,6 +25,7 @@ class HtpArch(IntEnum):
V69 = 69
V73 = 73
V75 = 75
V79 = 79


@dataclass
Expand All @@ -40,8 +41,10 @@ class QcomChipset(IntEnum):
SM8475 = 42 # v69
SM8550 = 43 # v73
SSG2115P = 46 # v73
SM8635 = 68 # v68
SM8650 = 57 # v75
SA8295 = 39 # v68
SM8750 = 69 # v79


@dataclass
Expand All @@ -54,7 +57,9 @@ class SocInfo:
QcomChipset.SM8450: SocInfo(QcomChipset.SM8450, HtpInfo(HtpArch.V69, 8)),
QcomChipset.SM8475: SocInfo(QcomChipset.SM8475, HtpInfo(HtpArch.V69, 8)),
QcomChipset.SM8550: SocInfo(QcomChipset.SM8550, HtpInfo(HtpArch.V73, 8)),
QcomChipset.SM8635: SocInfo(QcomChipset.SM8635, HtpInfo(HtpArch.V68, 4)),
QcomChipset.SM8650: SocInfo(QcomChipset.SM8650, HtpInfo(HtpArch.V75, 8)),
QcomChipset.SM8750: SocInfo(QcomChipset.SM8750, HtpInfo(HtpArch.V79, 8)),
QcomChipset.SSG2115P: SocInfo(QcomChipset.SSG2115P, HtpInfo(HtpArch.V73, 2)),
QcomChipset.SA8295: SocInfo(QcomChipset.SA8295, HtpInfo(HtpArch.V68, 8)),
}
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6 changes: 6 additions & 0 deletions backends/qualcomm/utils/utils.py
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Expand Up @@ -1058,7 +1058,9 @@ def generate_qnn_executorch_compiler_spec(
SM8450 (Snapdragon 8 Gen 1)
SM8475(Snapdragon 8 Gen 1+)
SM8550(Snapdragon 8 Gen 2)
SM8635(Snapdragon 8s Gen 3)
SM8650(Snapdragon 8 Gen 3)
SM8750(Snapdragon 8 Elite)
backend_options: Options required by different backends.
debug: Enable verbose logging. Disclaimer: this option must change in
the near future.
Expand Down Expand Up @@ -1148,7 +1150,9 @@ def generate_qnn_executorch_compiler_spec(
def get_soc_to_arch_map():
return {
"SSG2115P": HtpArch.V73,
"SM8750": HtpArch.V79,
"SM8650": HtpArch.V75,
"SM8635": HtpArch.V68,
"SM8550": HtpArch.V73,
"SM8475": HtpArch.V69,
"SM8450": HtpArch.V69,
Expand All @@ -1159,7 +1163,9 @@ def get_soc_to_arch_map():
def get_soc_to_chipset_map():
return {
"SSG2115P": QcomChipset.SSG2115P,
"SM8750": QcomChipset.SM8750,
"SM8650": QcomChipset.SM8650,
"SM8635": QcomChipset.SM8635,
"SM8550": QcomChipset.SM8550,
"SM8475": QcomChipset.SM8475,
"SM8450": QcomChipset.SM8450,
Expand Down
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