Apply XVC patch from openocd main to riscv

[stridge-tnp]

Applied patch from https://review.openocd.org/c/openocd/+/6867

[en-sc]

@stridge-tnp, AFAIU there is no intention to merge this PR, it is only needed to validate patches from https://review.openocd.org/c/openocd/+/6867?
If so, please, mark it as a draft PR: https://docs.github.com/en/pull-requests/collaborating-with-pull-requests/proposing-changes-to-your-work-with-pull-requests/changing-the-stage-of-a-pull-request#converting-a-pull-request-to-a-draft.

FIY, I've started the CI. It seems like the codestyle check via CheckPatch fails, though this is due to a rebase issue related to a500b2c

[stridge-tnp]

For anyone else trying to get RISCV on FPGA + openocd working this is the config i used with AXI to JTAG:

adapter driver xvc
adapter speed 100

xvc host 127.0.0.1
xvc port 2542

reset_config none

transport select jtag
set _CHIPNAME riscv
jtag newtap $_CHIPNAME tap -irlen 5 -expected-id 0x1babe247

set _TARGETNAME riscv
target create $_TARGETNAME.0 riscv -chain-position $_CHIPNAME.tap

riscv.0 configure -work-area-phys 0x60000000 -work-area-size 524288

riscv set_mem_access sysbus progbuf

init

[stridge-tnp]

@stridge-tnp, AFAIU there is no intention to merge this PR, it is only needed to validate patches from https://review.openocd.org/c/openocd/+/6867? If so, please, mark it as a draft PR: https://docs.github.com/en/pull-requests/collaborating-with-pull-requests/proposing-changes-to-your-work-with-pull-requests/changing-the-stage-of-a-pull-request#converting-a-pull-request-to-a-draft.

FIY, I've started the CI. It seems like the codestyle check via CheckPatch fails, though this is due to a rebase issue related to a500b2c

Took me a while to figure this all out and I thought I'd put this here for anyone else trying too. I don't know the process or anything. Draft seems like a good idea.