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11 changes: 6 additions & 5 deletions riscv/csrs.cc
Original file line number Diff line number Diff line change
Expand Up @@ -966,8 +966,11 @@ medeleg_csr_t::medeleg_csr_t(processor_t* const proc, const reg_t addr):
| (1 << CAUSE_FETCH_GUEST_PAGE_FAULT)
| (1 << CAUSE_LOAD_GUEST_PAGE_FAULT)
| (1 << CAUSE_VIRTUAL_INSTRUCTION)
| (1 << CAUSE_STORE_GUEST_PAGE_FAULT)
) {
| (1 << CAUSE_STORE_GUEST_PAGE_FAULT)),
mmu_exceptions(0
| (1 << CAUSE_FETCH_PAGE_FAULT)
| (1 << CAUSE_LOAD_PAGE_FAULT)
| (1 << CAUSE_STORE_PAGE_FAULT)) {
}

void medeleg_csr_t::verify_permissions(insn_t insn, bool write) const {
Expand All @@ -988,9 +991,7 @@ bool medeleg_csr_t::unlogged_write(const reg_t val) noexcept {
| (1 << CAUSE_STORE_ACCESS)
| (1 << CAUSE_USER_ECALL)
| (1 << CAUSE_SUPERVISOR_ECALL)
| (1 << CAUSE_FETCH_PAGE_FAULT)
| (1 << CAUSE_LOAD_PAGE_FAULT)
| (1 << CAUSE_STORE_PAGE_FAULT)
| (proc->supports_impl(IMPL_MMU) ? mmu_exceptions : 0)
| (proc->extension_enabled('H') ? hypervisor_exceptions : 0)
| (1 << CAUSE_SOFTWARE_CHECK_FAULT)
| (1 << CAUSE_HARDWARE_ERROR_FAULT)
Expand Down
1 change: 1 addition & 0 deletions riscv/csrs.h
Original file line number Diff line number Diff line change
Expand Up @@ -468,6 +468,7 @@ class medeleg_csr_t: public basic_csr_t {
virtual bool unlogged_write(const reg_t val) noexcept override;
private:
const reg_t hypervisor_exceptions;
const reg_t mmu_exceptions;
};

class sip_csr_t: public mip_proxy_csr_t {
Expand Down
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