Merge pull request #135 from riscv-software-src/csr_link

Ensure that CSR links are not applied when the index is a variable

Author: dhower-qc

lib/idl/ast.rb

@@ -5682,6 +5682,7 @@ def freeze_tree(symtab)
         @value = nil
       end
       @type = calc_type(symtab)
+      @archdef = symtab.archdef # remember archdef, used in gen_adoc pass
       freeze
     end
 
@@ -5813,6 +5814,12 @@ def initialize(input, interval, idx)
       @idx = idx
     end
 
+    def freeze_tree(symtab)
+      @archdef = symtab.archdef # remember archdef, used by gen_adoc pass
+      @idx.freeze_tree(symtab)
+      freeze
+    end
+
     # @!macro type
     def type(symtab)
       archdef = symtab.archdef

lib/idl/passes/gen_adoc.rb

@@ -295,7 +295,11 @@ def gen_adoc(indent = 0, indent_spaces: 2)
       if idx_text =~ /[0-9]+/
         "#{' '*indent}#{csr_text}"
       else
-        "#{' '*indent}%%LINK%csr_field;#{idx_text}.#{@field_name};#{csr_text}%%"
+        if @archdef.csr(csr_text).nil? 
+        "#{' '*indent}#{csr_text}"
+        else
+          "#{' '*indent}%%LINK%csr_field;#{idx_text}.#{@field_name};#{csr_text}%%"
+        end
       end
     end
   end
@@ -314,7 +318,11 @@ def gen_adoc(indent = 0, indent_spaces: 2)
         # we don't have the symtab to map this to a csr name
         "#{' '*indent}#{csr_text}"
       else
-        "#{' '*indent}%%LINK%csr;#{idx_text};#{csr_text}%%"
+        if @archdef.csr(csr_text).nil?
+          "#{' '*indent}#{csr_text}"
+        else
+          "#{' '*indent}%%LINK%csr;#{idx_text};#{csr_text}%%"
+        end
       end
     end
   end