Move the mcpwm on_full callback entry point to the IRAM. #490
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uLipe
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Just rebased to dev, it seems the master branch is not intended to be the target of PRs. |
It will ensure that all the ADC processing triggered by the MCPWM ISR can run if the ESP32 cache is disabled, preventing the application to crash. Signed-off-by: Felipe Neves <[email protected]>
uLipe
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Hi @uLipe , thank you so much for this! Its wonderful to have an ESP32 expert help us with difficult details like this, your contribution is greatly appreciated. |
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Thanks for this! This one literally takes an expert to catch and solve 🙃 |
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Thank you @runger1101001 and @askuric , I also have a WIP of adding the adc digi which results on a async and faster sample rate. For esp32 variant with some tricks it is possible to achieve +1MSPS delivered by DMA. |
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Thanks a bunch for this! I will merge it now. |
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Hello folks, after years following / and using simpleFoC, I finally found some spare time to contribute to it , I have been hacking ESP32 for doing motor control for a couple of years (and besides that I'm an ex-Espressifer) so I'd like to join the party here and try to help on making ESP32 usage more and more smooth.
Now, my first PR, I started with this small one after finding some crashes when using simpleFoC (and my own FoC lib) with LVGL, when the ESP32 cache is disabled plus the control torque is enabled, because the mcpwm uses a lambda for the on_full callback it is not placed in the IRAM, so if cache is disabled a crash is raised.
This PR address the issue, by removing the lambda expression and proper declaring the MCPWM hanlder at the iRAM, making sure that all processing of the MCPWM iSR happens at the IRAM.
Please let me know if I'm violating any rules of contribution.