Fix SysCfg hardfault, Add I2C Fast Mode Plus enable method

Embed.toml

@@ -0,0 +1,2 @@
+[default.rtt]
+enabled = true

examples/button.rs

@@ -5,14 +5,13 @@ use stm32g4xx_hal::{
     //delay::{DelayExt, SYSTDelayExt},
     gpio::{self, ExtiPin, GpioExt, Input, SignalEdge},
     rcc::RccExt,
-    stm32,
-    stm32::{interrupt, Interrupt},
+    stm32::{self, interrupt, Interrupt},
     syscfg::SysCfgExt,
 };
 
 use core::cell::RefCell;
 use core::sync::atomic::{AtomicBool, Ordering};
-use cortex_m::{asm::wfi, interrupt::Mutex};
+use cortex_m::interrupt::Mutex;
 use cortex_m_rt::entry;
 
 type ButtonPin = gpio::PC13<Input>;
@@ -52,8 +51,22 @@ fn main() -> ! {
     utils::logger::init();
 
     let mut dp = stm32::Peripherals::take().expect("cannot take peripherals");
+
+    // Workaround for RTT when using wfi instruction
+    // Enable the debug sleep bits in DBGMCU,
+    // then enable DMA peripheral clock in AHB1ENR
+    dp.DBGMCU.cr().modify(|_, w| {
+        w.dbg_sleep().set_bit();
+        w.dbg_stop().set_bit();
+        w.dbg_standby().set_bit()
+    });
+
     let mut rcc = dp.RCC.constrain();
-    let mut syscfg = dp.SYSCFG.constrain();
+
+    // Enable an AHB peripheral clock for debug probe with wfi
+    rcc.ahb1enr().modify(|_, w| w.dma1en().set_bit());
+
+    let mut syscfg = dp.SYSCFG.constrain(&mut rcc);
 
     println!("Led Init");
     // Configure PA5 pin to blink LED
@@ -80,7 +93,7 @@ fn main() -> ! {
 
     println!("Start Loop");
     loop {
-        wfi();
+        cortex_m::asm::wfi();
         println!("Check");
 
         if G_LED_ON.load(Ordering::Relaxed) {

src/syscfg.rs

@@ -1,25 +1,17 @@
-use crate::bb;
-use crate::stm32::{RCC, SYSCFG};
+use crate::rcc::Rcc;
+use crate::stm32::SYSCFG;
 use core::ops::Deref;
 
 /// Extension trait that constrains the `SYSCFG` peripheral
 pub trait SysCfgExt {
     /// Constrains the `SYSCFG` peripheral so it plays nicely with the other abstractions
-    fn constrain(self) -> SysCfg;
+    fn constrain(self, rcc: &mut Rcc) -> SysCfg;
 }
 
 impl SysCfgExt for SYSCFG {
-    fn constrain(self) -> SysCfg {
-        unsafe {
-            // NOTE(unsafe) this reference will only be used for atomic writes with no side effects.
-            let rcc = &(*RCC::ptr());
-
-            // Enable clock.
-            bb::set(&rcc.apb2enr(), 0);
-
-            // Stall the pipeline to work around erratum 2.1.13 (DM00037591)
-            cortex_m::asm::dsb();
-        }
+    fn constrain(self, rcc: &mut Rcc) -> SysCfg {
+        // Enable SYSCFG peripheral clock in APB2ENR register
+        rcc.apb2enr().modify(|_, w| w.syscfgen().set_bit());
 
         SysCfg(self)
     }