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@DrXiao DrXiao commented Nov 25, 2024

Upon further observation, I noticed that the instruction sequences of address-of and global address-of are highly similar and can be refined.

The proposed changes resemble my previous pull request (#167), but were discovered later, which is why I am submitting this pull request for improvement.

@jserv jserv changed the title Refine code generation for 'address of' operations Refine code generation for address-of operations Nov 25, 2024
@jserv jserv requested a review from vacantron November 25, 2024 14:46
The instruction sequences of address-of and global address-of
operations are similar but differ only in the register used for
certain instructions. The situation occurs for ARM and RISC-V
backends.

Thus, this commit adjusts the backend implementation to reuse
a unified code path when generating instructions for 'address of'
operations.
@jserv jserv merged commit 9bda64e into sysprog21:master Nov 26, 2024
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jserv commented Nov 26, 2024

Thank @DrXiao for contributing!

@DrXiao DrXiao deleted the refine-codegen branch November 26, 2024 13:12
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3 participants