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Refine code generation for address-of operations #168

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Merged
jserv merged 1 commit into from
Nov 26, 2024
Merged

Refine code generation for address-of operations #168

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13 changes: 4 additions & 9 deletions src/arm-codegen.c
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Original file line number Diff line number Diff line change
Expand Up @@ -197,6 +197,7 @@ void emit_ph2_ir(ph2_ir_t *ph2_ir)
* the instruction sequence of
* 1. division and modulo.
* 2. load and store operations.
* 3. address-of operations.
*/
arm_reg interm;

Expand All @@ -219,20 +220,14 @@ void emit_ph2_ir(ph2_ir_t *ph2_ir)
emit(__mov_i(__AL, rd, ph2_ir->src0));
return;
case OP_address_of:
if (ph2_ir->src0 > 255) {
emit(__movw(__AL, __r8, ph2_ir->src0));
emit(__movt(__AL, __r8, ph2_ir->src0));
emit(__add_r(__AL, rd, __sp, __r8));
} else
emit(__add_i(__AL, rd, __sp, ph2_ir->src0));
return;
case OP_global_address_of:
interm = ph2_ir->op == OP_address_of ? __sp : __r12;
if (ph2_ir->src0 > 255) {
emit(__movw(__AL, __r8, ph2_ir->src0));
emit(__movt(__AL, __r8, ph2_ir->src0));
emit(__add_r(__AL, rd, __r12, __r8));
emit(__add_r(__AL, rd, interm, __r8));
} else
emit(__add_i(__AL, rd, __r12, ph2_ir->src0));
emit(__add_i(__AL, rd, interm, ph2_ir->src0));
return;
case OP_assign:
emit(__mov_r(__AL, rd, rn));
Expand Down
15 changes: 5 additions & 10 deletions src/riscv-codegen.c
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Original file line number Diff line number Diff line change
Expand Up @@ -161,6 +161,7 @@ void emit_ph2_ir(ph2_ir_t *ph2_ir)
* the instruction sequence of
* 1. division and modulo.
* 2. load and store operations.
* 3. address-of operations.
*/
rv_reg interm, divisor_mask = __t1;

Expand All @@ -179,21 +180,15 @@ void emit_ph2_ir(ph2_ir_t *ph2_ir)
} else
emit(__addi(rd, __zero, ph2_ir->src0));
return;
case OP_global_address_of:
if (ph2_ir->src0 < -2048 || ph2_ir->src0 > 2047) {
emit(__lui(__t0, rv_hi(ph2_ir->src0)));
emit(__addi(__t0, __t0, rv_lo(ph2_ir->src0)));
emit(__add(rd, __gp, __t0));
} else
emit(__addi(rd, __gp, ph2_ir->src0));
return;
case OP_address_of:
case OP_global_address_of:
interm = ph2_ir->op == OP_address_of ? __sp : __gp;
if (ph2_ir->src0 < -2048 || ph2_ir->src0 > 2047) {
emit(__lui(__t0, rv_hi(ph2_ir->src0)));
emit(__addi(__t0, __t0, rv_lo(ph2_ir->src0)));
emit(__add(rd, __sp, __t0));
emit(__add(rd, interm, __t0));
} else
emit(__addi(rd, __sp, ph2_ir->src0));
emit(__addi(rd, interm, ph2_ir->src0));
return;
case OP_assign:
emit(__addi(rd, rs1, 0));
Expand Down