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This looks really, really nice from a quick glance! Let me know when you want me to take a closer look :) |
@usbalbin I don't think it is good idea to define pins here. In hals should be pin definitions and wrappers for initializers of structures defined here. |
Good idea! That makes sense |
So something roughly like #6? |
Yes. It looks more reasonable for me. |
Rebased. But no guaranty there is nothing missed. |
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rebased |
stm32f3 = { version = "0.16.0", optional = true } | ||
stm32h7 = { version = "0.16.0", optional = true } |
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Nice! :)
#[cfg(feature = "hrtim_v2")] | ||
use pac::hrtim_timf as timf; | ||
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#[derive(Clone, Copy, Debug, PartialEq, Eq)] |
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#[derive(Clone, Copy, Debug, PartialEq, Eq)] | |
#[derive(Clone, Copy, Debug, PartialEq, Eq)] | |
#[cfg_attr(feature = "defmt", derive(defmt::Format))] |
Is it possible to derive defmt::Format
for these?
F = 5, | ||
} | ||
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pub trait Instance: Deref<Target = Self::RB> { |
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Would you mind writing some very brief doc comment? For example, what is the difference of Instance
vs InstanceX
? :)
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The difference is that second one is not implemented for master timer. Although the names are not very good.
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So something like
pub trait Instance: Deref<Target = Self::RB> { | |
/// Any HR Timer A-F or Master | |
pub trait Instance: Deref<Target = Self::RB> { |
let common = unsafe { &*HRTIM_COMMON::ptr() }; | ||
common.cr1().modify(|_, w| match TIM::TIMX { | ||
Timer::Master => w.mudis().clear_bit(), | ||
Timer::Tim(v) => w.tudis(v as _).clear_bit(), |
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This really is very nice!
pub trait $TrR { | ||
$(fn $f(&self $(, $n: $e)?) -> $fr;)* | ||
} | ||
impl<REG: reg::$TrR> $TrR for R<REG> { |
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Just curious, what does these do?
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Is this somehow to abstract away the calls to the different functions of all timers?
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Just curious, what does these do?
What is the question about? The goal of these wrapper traits?
Maybe it is not the best solution but the best that I've found to abstract over similar but not identical registers across different peripherals. It requires fields to be reexported (derived in SVD) to work.
The idea is to use unique REGrs
register specification as associated type.
In current implementation you need 4 traits for each RW register: 2 traits for read and write implemented on REGrs
+ 1 wrapper for R<REGrs>
and 1 wrapper for W<REGrs
.
Alternative options:
- It can work without wrapper traits but you need to call it as
path_to::REGrs::field(&r)
or something like this. Which is annoying and different syntax. Works but not good. - You could make implementations directly on
R<REGrs>
andW<REGrs
. But in this case rust can't infer types and requirewhere
everywhere. Very bad.
But option 3=1+2 works.
The magic is in impl<REG: reg::RegRead> RegRead for R<REG>
line.
Something like
trait Instance {
type REG: RegRead + RegWrite; // it can be single `Reg` trait
}
allows to use canonical svd2rust
API (reg.write(|w| w.field().variant())
, reg.read().field().variant()
) for any generic PER: Instance
peripheral.
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I can not quite say I understand all implications of the above, but does seem to make a lot of sense :)
Thank you for the explanation
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This is very nice! Thanks a lot for this! :)
Since this changes quite a bit of(most) things, I would like to run some tests on some hardware just to confirm that at least some of the most basic things still work. I will try to do this in the coming days, hopefully.
In the meantime, CI seems to be a bit angry about capture.rs.
Not sure how to solve this. Maybe use some script to add |
Why CI does not run automatically? |
Correct me if I am wrong but I think a user gets "approved" for CI only after having their first PR merged
Oh sorry did not realise that |
I ran the tests added in stm32-rs/stm32g4xx-hal#192 for this branch and they pass. They dont test much but at least it is something :) I am happy to merge this now unless you have something more to add |
Nothing for now. At least until new |
Thank you! |
Only g4 for now.