mcux: C40 flash (S32K3x): run mutating ops from SRAM for XIP; add S32K344 array geometry header #618
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Introduce fsl_c40_flash_features.h with S32K344 C40 array geometry (block sizes and counts). Signed-off-by: Sumit Batra <[email protected]>
Mark the C40 operations that issue flash commands as __ramfunc so they execute from SRAM on Cortex-M7 XIP systems: - FLASH_Program() - FLASH_Erase() - FLASH_SetSectorProtection() Signed-off-by: Sumit Batra <[email protected]>
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@sumitbatra-nxp Please submit this change to the SDK team. I have provided you details on where to submit the PR via our chat channel. |
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Let us know once this is accepted by the SDK team and update this PR if needed. |
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Sure.. |
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Title: mcux: C40 flash (S32K3x): run mutating ops from SRAM for XIP; add S32K344 array geometry header
Summary
This PR improves reliability of the MCUX C40 flash driver on XIP systems (e.g. S32K344) and adds a small features header describing the C40 array geometry.
What’s included
flash_c40: execute mutating ops from SRAM on XIP
Mark FLASH_Program(), FLASH_Erase(), and FLASH_SetSectorProtection() as __ramfunc so they run from SRAM when the code executes in place from internal flash.
Prevents stalls/faults caused by issuing flash commands while fetching instructions from the same flash array.
No behavior change on non-XIP builds.
flash_c40: add SoC features header
Introduces fsl_c40_flash_features.h with S32K344 C40 geometry (block sizes/counts).
Purely additive; intended for consumers (e.g., Zephyr internal-flash glue) that need compile-time array parameters.
Rationale
On Cortex-M XIP systems, flash program/erase/lock sequences must not execute from the same flash array they modify. Relocating these critical routines to SRAM is a standard mitigation that avoids bus contention and hard faults, especially under bootloader + application scenarios.
Compatibility
No public API changes.
__ramfunc (or the MCUX equivalent) is used; toolchains map it to an SRAM code section. On non-XIP builds, the attribute is effectively neutral.
Testing
Hardware: NXP S32K344 (MR-CANHUBK3).
Verified program/erase and sector protection operations via Zephyr flash_shell and MCUboot chain-load.
Confirmed stable execution with functions relocated to SRAM.
Follow-ups / Consumers
Zephyr driver glue for C40 uses this update; following Zephyr PR bumps west.yml to this HAL revision.
This PR is created to support Zephyr PR - zephyrproject-rtos/zephyr#97401
Signed-off-by: Sumit Batra [email protected]