nxp/s32k3: add C40 internal flash driver + MCUboot flow for MR-CANHUBK3 #97401

sumitbatra-nxp · 2025-10-11T20:25:12Z

This series brings full internal-flash (C40) support and an end-to-end
MCUboot flow to the NXP MR-CANHUBK3 (S32K344) board.

What’s included

New driver: drivers/flash/flash_mcux_c40.c for the S32K3x C40 array

8 KiB erase / 8-byte write unit, page layout reporting

D-cache invalidation after mutating ops

Optional protection policy to lock IVT/MCUboot partitions at init
(CONFIG_FLASH_MCUX_C40_APPLY_PROTECTION)

Automatic relocation of driver + HAL to SRAM when XIP

Bindings & SoC DTSI: nxp,s32k3x-c40-flash.yaml and flash0 node in
nxp_s32k344_m7.dtsi (left status = "disabled" by default)

IVT/linker gating: place .ivt_header only when XIP and either
standalone app or MCUboot itself (avoid clashing with MCUboot image header
when chainloaded)

Board support: MCUboot partition layout & code-partition overlays for
mr_canhubk3, plus a small doc update

mr_canhubk3_mcuboot_layout.overlay

mr_canhubk3_mcuboot_boot.overlay (bootloader links to &mcuboot)

mr_canhubk3_mcuboot_app.overlay (app links to &slot0_partition)

Kconfig.defconfig: under BOOTLOADER_MCUBOOT, default
ROM_START_OFFSET=0x400 and
MCUBOOT_EXTRA_IMGTOOL_ARGS="--header-size 0x400"

Sample convenience: samples/drivers/flash_shell/overlay-mcuboot.conf

BUILD MCUBOOT
west build -p always -b mr_canhubk3 -d build/mcuboot bootloader/mcuboot/boot/zephyr -DEXTRA_DTC_OVERLAY_FILE="$PWD/zephyr/boards/nxp/mr_canhubk3/mr_canhubk3_mcuboot_layout.overlay;$PWD/zephyr/boards/nxp/mr_canhubk3/mr_canhubk3_mcuboot_boot.overlay"

BUILD FLASH_SHELL APP TO BE LOADED FROM MCUBOOT
west build -p always -b mr_canhubk3 -d build/flash_shell zephyr/samples/drivers/flash_shell -DEXTRA_DTC_OVERLAY_FILE="$PWD/zephyr/boards/nxp/mr_canhubk3/mr_canhubk3_mcuboot_layout.overlay;$PWD/zephyr/boards/nxp/mr_canhubk3/mr_canhubk3_mcuboot_app.overlay" -DOVERLAY_CONFIG=overlay-mcuboot.conf -DEXTRA_CONF_FILE="$PWD/zephyr/boards/nxp/mr_canhubk3/overlay-mcuboot-1kheader.conf"

SIGN APP IMAGE
west sign -d build/flash_shell -t imgtool -- --key "$PWD/bootloader/mcuboot/root-rsa-2048.pem" --header-size 0x400

These changes need NXP_HAL PR -
zephyrproject-rtos/hal_nxp#618

For now I have disabled the flash0 node, till the time HAL changes are merged.

Add a Zephyr flash shim for the on-chip C40 flash controller used on NXP S32K3x (e.g. S32K344). The driver is backed by the MCUX C40 HAL and implements read/erase/program, page layout, and an optional protection policy that can lock well-known regions (IVT/MCUboot) derived from devicetree. Key details: - Selects FLASH_HAS_DRIVER_ENABLED / FLASH_HAS_EXPLICIT_ERASE / FLASH_HAS_PAGE_LAYOUT. - Runs erase/program from SRAM when XIP by relocating both the shim and the MCUX HAL source if CODE_DATA_RELOCATION_SRAM=y. - Optional protection pass at init (FLASH_MCUX_C40_APPLY_PROTECTION), which aligns windows to sector boundaries and applies lock/unlock using the HAL. This is useful on XIP systems to keep IVT/bootloader ranges read-only; can be disabled if a bootloader or security policy manages protection instead. Files: - drivers/flash/flash_mcux_c40.c (new) - drivers/flash/CMakeLists.txt (+zephyr_code_relocate when needed) - drivers/flash/Kconfig.mcux (+FLASH_MCUX_C40_API, +FLASH_MCUX_C40_APPLY_PROTECTION) - modules/hal_nxp/mcux/mcux-sdk-ng/drivers/drivers.cmake (+driver.flash_c40) Signed-off-by: Sumit Batra <[email protected]>

Introduce a DT binding for the S32K3x on-chip C40 flash and describe the SoC-level flash0 node in nxp_s32k344_m7.dtsi using the new compatible. - Binding: dts/bindings/flash_controller/nxp,s32k3x-c40-flash.yaml (inherits soc-nv-flash.yaml; documents erase/write block sizes and NXP block geometry properties). - SoC node: flash0@0x00400000 with the new compatible and geometry properties. Keep status = "disabled" at the SoC level so boards opt-in. This prepares the platform for using Zephyr’s flash API / FLASH_MAP / MCUboot with internal code flash. Files: - dts/bindings/flash_controller/nxp,s32k3x-c40-flash.yaml (new) - dts/arm/nxp/nxp_s32k344_m7.dtsi (define flash0, status = "disabled") Signed-off-by: Sumit Batra <[email protected]>

Enable the SoC C40 internal flash on mr_canhubk3 and add a complete set of overlays to build MCUboot + an MCUboot-chained app using internal flash. - Enable &flash0 at the board level. - Add MCUboot partition layout overlay with ivt-header/ivt_pad/mcuboot/ image-0/image-1/image-scratch. - Add direction overlays: * mr_canhubk3_mcuboot_boot.overlay (bootloader links to &mcuboot) * mr_canhubk3_mcuboot_app.overlay (app links to &slot0_partition) - Add an option to enable booting through MCUboot, in application's overlay-mcuboot.conf - Add CONFIG_ROM_START_OFFSET=0x400 in board's Kconfig.defconfig To make bootloader and the sign tool compatible with S32K3 placing the vector table at +0x400 - Provide overlay-mcuboot-1kheader.conf, which passes CONFIG_MCUBOOT_EXTRA_IMGTOOL_ARGS="--header-size 0x400" so the signed image uses a 1 KiB header, matching the S32K3 vector table alignment. - Update board docs (index.rst): step-by-step MCUboot flow, two signing options (0x200 vs 0x400 header), and example west build/sign/flash commands. This keeps base DTS neutral and puts MCUboot-specific enablement in overlays/config only. Example (MCUboot): west build -p always -b mr_canhubk3 bootloader/mcuboot/boot/zephyr -- \ -DEXTRA_DTC_OVERLAY_FILE="boards/nxp/mr_canhubk3/mr_canhubk3_mcuboot_layout.overlay;boards/nxp/mr_canhubk3/mr_canhubk3_mcuboot_boot.overlay" Example (App): west build -p always -b mr_canhubk3 -d build/flash_shell zephyr/samples/drivers/flash_shell -DEXTRA_DTC_OVERLAY_FILE="$PWD/zephyr/boards/nxp/mr_canhubk3/mr_canhubk3_mcuboot_layout.overlay;$PWD/zephyr/boards/nxp/mr_canhubk3/mr_canhubk3_mcuboot_app.overlay" -DOVERLAY_CONFIG=overlay-mcuboot.conf -DEXTRA_CONF_FILE="$PWD/zephyr/boards/nxp/mr_canhubk3/overlay-mcuboot-1kheader.conf" west sign -d build/flash_shell -t imgtool -- --key "$PWD/bootloader/mcuboot/root-rsa-2048.pem" --header-size 0x400 Files: - boards/nxp/mr_canhubk3/mr_canhubk3.dts - boards/nxp/mr_canhubk3/mr_canhubk3_mcuboot_layout.overlay (new) - boards/nxp/mr_canhubk3/mr_canhubk3_mcuboot_boot.overlay (new) - boards/nxp/mr_canhubk3/mr_canhubk3_mcuboot_app.overlay (new) - boards/nxp/mr_canhubk3/overlay-mcuboot-1kheader.conf (new) - boards/nxp/mr_canhubk3/doc/index.rst - boards/nxp/mr_canhubk3/Kconfig.defconfig - samples/drivers/flash_shell/overlay-mcuboot.conf (new) Signed-off-by: Sumit Batra <[email protected]>

Emit the IVT section and IVT header only when XIP and the image is either a standalone XIP app or MCUboot itself. Do not emit the IVT when the Zephyr image is chain-loaded by MCUboot (BOOTLOADER_MCUBOOT=y). - linker.ld/sections.ld: place .ivt_header at IVT_HEADER only under XIP && (!BOOTLOADER_MCUBOOT || MCUBOOT). Provide __ivt_region_start/end symbols. - soc.c: guard IVT struct under the same condition and mark it 'used' so the linker keeps it when needed. This avoids populating 0x400000 IVT from the app image while retaining it for MCUboot or standalone XIP use-cases. Files: - soc/nxp/s32/s32k3/linker.ld - soc/nxp/s32/s32k3/sections.ld - soc/nxp/s32/s32k3/soc.c Signed-off-by: Sumit Batra <[email protected]>

Signed-off-by: Sumit Batra <[email protected]>

github-actions · 2025-10-11T20:26:16Z

The following west manifest projects have changed revision in this Pull Request:

Name	Old Revision	New Revision	Diff
hal_nxp	zephyrproject-rtos/hal_nxp@`4377ecf`	zephyrproject-rtos/hal_nxp#618	zephyrproject-rtos/hal_nxp#618/files

⛔ DNM label due to: 1 project with PR revision

Note: This message is automatically posted and updated by the Manifest GitHub Action.

sonarqubecloud · 2025-10-11T20:29:01Z

Quality Gate passed

Issues
0 New issues
0 Accepted issues

Measures
0 Security Hotspots
0.0% Coverage on New Code
0.0% Duplication on New Code

See analysis details on SonarQube Cloud

JarmouniA · 2025-10-11T21:02:27Z

boards/nxp/mr_canhubk3/Kconfig.defconfig

+
+# S32K3 places the vector table at +0x400
+# This makes the bootloader and the sign tool compatible with that.
+config ROM_START_OFFSET


Should probably be done at the soc level, similar to

zephyr/soc/nxp/rw/Kconfig.defconfig

Line 7 in c9d3a01

default 0x400 if BOOTLOADER_MCUBOOT

Agreed, I just kept it with board's defconfig since I was just able to validate it CANHUBK3 board yet.

JarmouniA · 2025-10-11T21:05:33Z

boards/nxp/mr_canhubk3/doc/index.rst

+   **must be signed with a 1 KiB (0x400) header**. You do **not** need to
+   change :kconfig:option:`CONFIG_ROM_START_OFFSET` in your app (the
+   S32K3 linker naturally aligns the vector table to 0x400 when needed),
+   but you **do** need to sign the image with ``--header-size 0x400``.


You should look at sysbuild & MCUboot CMake in Zephyr, they already handle many things added in the PR such as this

zephyr/cmake/mcuboot.cmake

Line 105 in c9d3a01

--version ${CONFIG_MCUBOOT_IMGTOOL_SIGN_VERSION} --header-size ${CONFIG_ROM_START_OFFSET}

@JarmouniA ..
Agreed that S32K3 linker does take care of the right alignment of the vector table
but if I don't change CONFIG_ROM_START_OFFSET explicitly, then MCUboot looks out for the vector table at default 0x200 offset.
With the commands that I have mentioned in the PR description, if I don't change CONFIG_ROM_START_OFFSET to 0x400 then MCUboot cannot jump to the right Zephyr image in slot0.

you have not configured things right if that is the case, this is all handled and works fine on other devices (also as said, use sysbuild, none of this manual signing stuff, in which case you don't need to document anything here because it should just work like it does for other boards)

JarmouniA · 2025-10-11T21:07:38Z

boards/nxp/mr_canhubk3/doc/index.rst

+
+   west build -b mr_canhubk3 -d build/mcuboot bootloader/mcuboot/boot/zephyr \
+     -DEXTRA_DTC_OVERLAY_FILE="boards/nxp/mr_canhubk3/mr_canhubk3_mcuboot_layout.overlay;boards/nxp/mr_canhubk3/mr_canhubk3_mcuboot_boot.overlay"
+


please update this with Zephyr app build commands, and use Sysbuild.
https://docs.zephyrproject.org/latest/contribute/documentation/guidelines.html#application-build-commands
https://docs.zephyrproject.org/latest/build/sysbuild/index.html

JarmouniA · 2025-10-11T21:08:05Z

boards/nxp/mr_canhubk3/doc/index.rst

+
+   west build -b mr_canhubk3 -d build/flash_shell samples/drivers/flash_shell \
+     -DEXTRA_DTC_OVERLAY_FILE="boards/nxp/mr_canhubk3/mr_canhubk3_mcuboot_layout.overlay;boards/nxp/mr_canhubk3/mr_canhubk3_mcuboot_app.overlay" \
+     -DOVERLAY_CONFIG=samples/drivers/flash_shell/overlay-mcuboot.conf


JarmouniA · 2025-10-11T21:13:15Z

boards/nxp/mr_canhubk3/mr_canhubk3_mcuboot_app.overlay

This should be in dts of an MCUboot board variant.
An example 69edf96

JarmouniA · 2025-10-11T21:25:47Z

dts/bindings/flash_controller/nxp,s32k3x-c40-flash.yaml

+description: >
+  On-chip C40 flash used in NXP S32K3x MCUs (e.g. S32K344). This node
+  represents the internal code flash region (typically bound to &flash0)
+  used by Zephyr’s flash API / FLASH_MAP / MCUboot.


Suggested change

description: >

On-chip C40 flash used in NXP S32K3x MCUs (e.g. S32K344). This node

represents the internal code flash region (typically bound to &flash0)

used by Zephyr’s flash API / FLASH_MAP / MCUboot.

description: |

On-chip C40 flash used in NXP S32K3x MCUs (e.g. S32K344).

JarmouniA · 2025-10-11T21:26:21Z

dts/bindings/flash_controller/nxp,s32k3x-c40-flash.yaml

+
+compatible: "nxp,s32k3x-c40-flash"
+
+# Inherit common SoC flash schema (reg/status, partitions, etc.)


Suggested change

# Inherit common SoC flash schema (reg/status, partitions, etc.)

JarmouniA · 2025-10-11T21:26:31Z

dts/bindings/flash_controller/nxp,s32k3x-c40-flash.yaml

+
+properties:
+  erase-block-size:
+    type: int


Suggested change

type: int

JarmouniA · 2025-10-11T21:27:01Z

dts/bindings/flash_controller/nxp,s32k3x-c40-flash.yaml

+    description: Minimum erase size for C40 is 8 KiB.
+
+  write-block-size:
+    type: int


Suggested change

type: int

JarmouniA · 2025-10-11T21:29:15Z

drivers/flash/Kconfig.mcux

+	  Enable the MCUX C40 internal flash API shim used on NXP S32K3x
+	  (e.g. S32K344). Provides Zephyr flash driver glue for &flash0 using
+	  the MCUX C40 HAL. Needed for FLASH_MAP/MCUboot on internal flash


Suggested change

Enable the MCUX C40 internal flash API shim used on NXP S32K3x

(e.g. S32K344). Provides Zephyr flash driver glue for &flash0 using

the MCUX C40 HAL. Needed for FLASH_MAP/MCUboot on internal flash

Enable the MCUX C40 internal flash driver used on NXP S32K3x

(e.g. S32K344). Provides Zephyr flash API using MCUX C40 HAL.

nordicjm · 2025-10-13T07:30:54Z

drivers/flash/CMakeLists.txt

+if(CONFIG_FLASH_MCUX_C40_API AND CONFIG_CODE_DATA_RELOCATION)
+  zephyr_code_relocate(FILES ${CMAKE_CURRENT_LIST_DIR}/flash_mcux_c40.c LOCATION RAM)
+  if(DEFINED ZEPHYR_HAL_NXP_MODULE_DIR)
+      # Relocating HAL driver from Zephyr keeping HAL RTOS-agnostic


cmake indent is 2 spaces

nordicjm · 2025-10-13T07:31:48Z

drivers/flash/flash_mcux_c40.c

+
+#include "fsl_c40_flash.h"
+
+/* -------- Helpers -------- */


Suggested change

/* -------- Helpers -------- */

nordicjm · 2025-10-13T07:32:02Z

drivers/flash/flash_mcux_c40.c

+	return (a_off < b_end) && (b_off < a_end);
+}
+
+/* -------- Flash API -------- */


Suggested change

/* -------- Flash API -------- */

nordicjm · 2025-10-13T07:32:19Z

drivers/flash/flash_mcux_c40.c

+		return -EINVAL;
+	}
+
+	unsigned int key = irq_lock();


define variables at top of scope, fix in whole PR

nordicjm · 2025-10-13T07:32:49Z

drivers/flash/flash_mcux_c40.c

+}
+#endif
+
+/* -------- Optional “lock policy” executed at init (opt-in via Kconfig) -------- */


remove --- part, this is not how comments are done in zephyr fix in whole PR

nordicjm · 2025-10-13T07:35:07Z

boards/nxp/mr_canhubk3/doc/index.rst

+   **must be signed with a 1 KiB (0x400) header**. You do **not** need to
+   change :kconfig:option:`CONFIG_ROM_START_OFFSET` in your app (the
+   S32K3 linker naturally aligns the vector table to 0x400 when needed),
+   but you **do** need to sign the image with ``--header-size 0x400``.


you have not configured things right if that is the case, this is all handled and works fine on other devices (also as said, use sysbuild, none of this manual signing stuff, in which case you don't need to document anything here because it should just work like it does for other boards)

nordicjm · 2025-10-13T07:37:11Z

west.yml

      groups:
        - hal
    - name: hal_nxp
-      revision: 4377ecfba52fe0ff7352eadf426b523ed3e1d27f


you cannot update a manifest after making changes in tree that require it, update it before

sumitbatra-nxp added 5 commits October 12, 2025 01:27

west.yml: hal_nxp: update revision to pull in C40 flash driver

eea1be7

Signed-off-by: Sumit Batra <[email protected]>

github-actions bot added manifest manifest-hal_nxp DNM (manifest) This PR should not be merged (controlled by action-manifest) labels Oct 11, 2025

zephyrbot added area: Devicetree Bindings area: Flash area: Samples Samples platform: NXP NXP area: Boards/SoCs platform: NXP S32 NXP Semiconductors, S32 labels Oct 11, 2025

zephyrbot requested review from Dat-NguyenDuy, EmilioCBen, JiafeiPan, MaochenWang1, PetervdPerk-NXP, ZhaoxiangJin, axelnxp, bperseghetti, congnguyenhuu, dbaluta, de-nordic, decsny, dleach02, manuargue and mmahadevan108 October 11, 2025 20:27

zephyrbot assigned dleach02, mmahadevan108 and decsny Oct 11, 2025

sumitbatra-nxp mentioned this pull request Oct 11, 2025

mcux: C40 flash (S32K3x): run mutating ops from SRAM for XIP; add S32K344 array geometry header zephyrproject-rtos/hal_nxp#618

Open

JarmouniA requested changes Oct 11, 2025

View reviewed changes

nordicjm requested changes Oct 13, 2025

View reviewed changes


		west build -b mr_canhubk3 -d build/mcuboot bootloader/mcuboot/boot/zephyr \
		-DEXTRA_DTC_OVERLAY_FILE="boards/nxp/mr_canhubk3/mr_canhubk3_mcuboot_layout.overlay;boards/nxp/mr_canhubk3/mr_canhubk3_mcuboot_boot.overlay"


		compatible: "nxp,s32k3x-c40-flash"

		# Inherit common SoC flash schema (reg/status, partitions, etc.)

nxp/s32k3: add C40 internal flash driver + MCUboot flow for MR-CANHUBK3 #97401

Are you sure you want to change the base?

nxp/s32k3: add C40 internal flash driver + MCUboot flow for MR-CANHUBK3 #97401

Conversation

sumitbatra-nxp commented Oct 11, 2025 • edited Loading Uh oh! There was an error while loading. Please reload this page.

Uh oh!

Uh oh!

github-actions bot commented Oct 11, 2025

Uh oh!

sonarqubecloud bot commented Oct 11, 2025

Quality Gate passed

Uh oh!

Choose a reason for hiding this comment

Uh oh!

Choose a reason for hiding this comment

Uh oh!

JarmouniA Oct 11, 2025 • edited Loading Uh oh! There was an error while loading. Please reload this page.

Uh oh!

Choose a reason for hiding this comment

Uh oh!

sumitbatra-nxp Oct 12, 2025 • edited Loading Uh oh! There was an error while loading. Please reload this page.

Uh oh!

Choose a reason for hiding this comment

Uh oh!

Choose a reason for hiding this comment

Uh oh!

Choose a reason for hiding this comment

Uh oh!

Choose a reason for hiding this comment

Uh oh!

Choose a reason for hiding this comment

Uh oh!

Choose a reason for hiding this comment

Uh oh!

Choose a reason for hiding this comment

Uh oh!

Choose a reason for hiding this comment

Uh oh!

Choose a reason for hiding this comment

Uh oh!

Choose a reason for hiding this comment

Uh oh!

Choose a reason for hiding this comment

Uh oh!

Choose a reason for hiding this comment

Uh oh!

Choose a reason for hiding this comment

Uh oh!

Choose a reason for hiding this comment

Uh oh!

Choose a reason for hiding this comment

Uh oh!

Choose a reason for hiding this comment

Uh oh!

Choose a reason for hiding this comment

Uh oh!

Reviewers

Assignees

Labels

Projects

Milestone

Development

Uh oh!

7 participants

sumitbatra-nxp commented Oct 11, 2025 •

edited

Loading

JarmouniA Oct 11, 2025 •

edited

Loading

sumitbatra-nxp Oct 12, 2025 •

edited

Loading