nxp/s32k3: add C40 internal flash driver + MCUboot flow for MR-CANHUBK3

boards/nxp/mr_canhubk3/Kconfig.defconfig

@@ -33,4 +33,14 @@
 
 endif # NETWORKING
 
+if BOOTLOADER_MCUBOOT
+
+# S32K3 places the vector table at +0x400
+# This makes the bootloader and the sign tool compatible with that.
+config ROM_START_OFFSET
+    hex
+    default 0x400
+
+endif
+
 endif # BOARD_MR_CANHUBK3

boards/nxp/mr_canhubk3/doc/index.rst

@@ -296,6 +296,81 @@ For example, to erase and verify flash content:
 
    west flash -r trace32 --startup-args elfFile=build/zephyr/zephyr.elf loadTo=flash eraseFlash=yes verifyFlash=yes
 
+MCUboot chain-loading
+=====================
+
+This board supports booting Zephyr applications via :ref:`mcuboot`.
+
+.. important::
+
+   On S32K3 the vector table is larger than 512 bytes, so MCUboot images
+   **must be signed with a 1 KiB (0x400) header**. You do **not** need to
+   change :kconfig:option:`CONFIG_ROM_START_OFFSET` in your app (the
+   S32K3 linker naturally aligns the vector table to 0x400 when needed),
+   but you **do** need to sign the image with ``--header-size 0x400``.
+
+Build and flash MCUboot
+-----------------------
+
+Use the provided overlays to place MCUboot and the application slots in
+internal flash (PFLASH):
+
+.. code-block:: console
+
+   west build -b mr_canhubk3 -d build/mcuboot bootloader/mcuboot/boot/zephyr \
+     -DEXTRA_DTC_OVERLAY_FILE="boards/nxp/mr_canhubk3/mr_canhubk3_mcuboot_layout.overlay;boards/nxp/mr_canhubk3/mr_canhubk3_mcuboot_boot.overlay"
+
+   west flash -d build/mcuboot -r jlink
+
+Build the application for MCUboot
+---------------------------------
+
+Use the application overlay so the app links to the primary slot:
+
+.. code-block:: console
+
+   west build -b mr_canhubk3 -d build/flash_shell samples/drivers/flash_shell \
+     -DEXTRA_DTC_OVERLAY_FILE="boards/nxp/mr_canhubk3/mr_canhubk3_mcuboot_layout.overlay;boards/nxp/mr_canhubk3/mr_canhubk3_mcuboot_app.overlay" \
+     -DOVERLAY_CONFIG=samples/drivers/flash_shell/overlay-mcuboot.conf
+
+Sign the image with a 1 KiB header
+----------------------------------
+
+Either pass the extra header size when signing:
+
+.. code-block:: console
+
+   west sign -d build/flash_shell -t imgtool -- \
+     --key bootloader/mcuboot/root-rsa-2048.pem \
+     --header-size 0x400
+
+or bake it into the build with:
+
+.. code-block:: console
+
+   -DMCUBOOT_EXTRA_IMGTOOL_ARGS="--header-size 0x400"
+
+Flash the signed application
+----------------------------
+
+.. code-block:: console
+
+   west flash -d build/flash_shell -r jlink -f build/flash_shell/zephyr/zephyr.signed.hex
+
+After reset you should see MCUboot logs followed by the application banner
+(e.g. the Flash Shell prompt).
+
+Troubleshooting
+---------------
+
+* If MCUboot prints *“Image in the primary slot is not valid”* or gets stuck
+  after *“Jumping to the first image slot”*, the image was likely signed with
+  a 512-byte header. Re-sign with ``--header-size 0x400`` and re-flash.
+
+* Do **not** add an IVT to MCUboot-chainloaded applications. The SoC support
+  emits the IVT for standalone/XIP images or for MCUboot itself; it is
+  automatically omitted for apps built with :kconfig:option:`CONFIG_BOOTLOADER_MCUBOOT`.
+
 Debugging
 =========
 

boards/nxp/mr_canhubk3/mr_canhubk3.dts

@@ -216,6 +216,8 @@
 };
 
 &flash0 {
+	status = "disabled";
+
 	partitions {
 		compatible = "fixed-partitions";
 		#address-cells = <1>;

boards/nxp/mr_canhubk3/mr_canhubk3_mcuboot_app.overlay

@@ -0,0 +1,8 @@
+/ {
+	chosen {
+		/* App links to primary slot when booted by MCUboot */
+		zephyr,code-partition = &slot0_partition;
+		/* Ensure we are using internal flash as the main flash */
+		zephyr,flash = &flash0;
+	};
+};

boards/nxp/mr_canhubk3/mr_canhubk3_mcuboot_boot.overlay

@@ -0,0 +1,8 @@
+/ {
+	chosen {
+		/* Bootloader image is linked to its own partition */
+		zephyr,code-partition = &mcuboot;
+		/* Ensure we are using internal flash as the main flash */
+		zephyr,flash = &flash0;
+	};
+};

boards/nxp/mr_canhubk3/mr_canhubk3_mcuboot_layout.overlay

@@ -0,0 +1,44 @@
+&flash0 {
+	/* Replace any board-default partitions with the MCUboot layout */
+	/delete-node/ partitions;
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		ivt_header: partition@0 {
+			label = "ivt-header";
+			reg = <0x00000000 0x00000100>;
+		};
+
+		/* pad up to the 8 KiB sector boundary at 0x2000 */
+		ivt_pad: partition@100 {
+			label = "ivt_pad";
+			reg = <0x00000100 0x00001F00>;
+		};
+
+		/* MCUboot @ 0x2000 (128 KiB here; adjust if you use 64 KiB) */
+		mcuboot: partition@2000 {
+			label = "mcuboot";
+			reg = <0x00002000 0x00020000>;
+		};
+
+		/* Primary image (slot 0) */
+		slot0_partition: partition@22000 {
+			label = "image-0";
+			reg = <0x00022000 0x001C0000>;
+		};
+
+		/* Secondary image (slot 1) — start right after slot0 ends */
+		slot1_partition: partition@1E2000 {
+			label = "image-1";
+			reg = <0x001E2000 0x001C0000>;
+		};
+
+		/* Scratch (swap) area */
+		scratch_partition: partition@3A2000 {
+			label = "image-scratch";
+			reg = <0x003A2000 0x00040000>;
+		};
+	};
+};

boards/nxp/mr_canhubk3/overlay-mcuboot-1kheader.conf

@@ -0,0 +1 @@
+CONFIG_MCUBOOT_EXTRA_IMGTOOL_ARGS="--header-size 0x400"

drivers/flash/CMakeLists.txt

@@ -167,6 +167,16 @@ if(CONFIG_FLASH_NXP_S32_QSPI_NOR OR CONFIG_FLASH_NXP_S32_QSPI_HYPERFLASH)
   zephyr_library_include_directories(${ZEPHYR_BASE}/drivers/memc)
 endif()
 
+zephyr_library_sources_ifdef(CONFIG_FLASH_MCUX_C40_API flash_mcux_c40.c)
+# Run the driver from RAM or another relocation source when relocation is enabled
+if(CONFIG_FLASH_MCUX_C40_API AND CONFIG_CODE_DATA_RELOCATION)
+  zephyr_code_relocate(FILES ${CMAKE_CURRENT_LIST_DIR}/flash_mcux_c40.c LOCATION RAM)
+  if(DEFINED ZEPHYR_HAL_NXP_MODULE_DIR)
+      # Relocating HAL driver from Zephyr keeping HAL RTOS-agnostic
+      zephyr_code_relocate(FILES ${ZEPHYR_HAL_NXP_MODULE_DIR}/mcux/mcux-sdk-ng/drivers/flash_c40/fsl_c40_flash.c LOCATION RAM)
+  endif()
+endif()
+
 if(CONFIG_SOC_FLASH_RENESAS_RA_HP)
   zephyr_library_sources(soc_flash_renesas_ra_hp.c)
   zephyr_library_sources_ifdef(CONFIG_FLASH_EX_OP_ENABLED soc_flash_renesas_ra_hp_ex_op.c)

drivers/flash/Kconfig.mcux

@@ -118,3 +118,32 @@ choice FLASH_LOG_LEVEL_CHOICE
 endchoice
 
 endif # DT_HAS_NXP_IMX_FLEXSPI_ENABLED
+
+# MCUX C40 internal flash API shim (S32K3x)
+config FLASH_MCUX_C40_API
+	def_bool y
+	depends on SOC_SERIES_S32K3
+	depends on DT_HAS_NXP_S32K3X_C40_FLASH_ENABLED
+	select FLASH_HAS_DRIVER_ENABLED
+	select FLASH_HAS_EXPLICIT_ERASE
+	select FLASH_HAS_PAGE_LAYOUT
+	# C40 uses controller commands, not CPU stores to flash
+	# so we are not relaxing MPU for ROM writes.
+	# Relocate driver/HAL when XIP so erase/program run from SRAM:
+	imply CODE_DATA_RELOCATION if XIP
+	imply CODE_DATA_RELOCATION_SRAM if XIP
+	help
+	  Enable the MCUX C40 internal flash API shim used on NXP S32K3x
+	  (e.g. S32K344). Provides Zephyr flash driver glue for &flash0 using
+	  the MCUX C40 HAL. Needed for FLASH_MAP/MCUboot on internal flash
+
+# NXP MCUX C40 internal flash: optional protection pass at init
+config FLASH_MCUX_C40_APPLY_PROTECTION
+	bool "Apply default protection windows (IVT/MCUboot) at init"
+	depends on FLASH_MCUX_C40_API
+	default y if XIP
+	help
+	  When enabled, the driver locks/unlocks protection for well-known
+	  regions derived from devicetree (e.g. ivt_header, ivt_pad, mcuboot)
+	  during driver init. Useful on XIP systems to keep IVT/bootloader
+	  areas read-only. Disable if your bootloader/policy manages this.