drivers: adc: Add Infineon PSOC4 SAR ADC support #103453

laneb-infineon · 2026-02-04T02:09:16Z

This enables ADC driver support for PSOC4-based boards including cy8ckit_041s_max and cy8cproto_041tp.

This supercedes #101600

teburd · 2026-02-09T21:26:15Z

drivers/adc/adc_infineon_psoc4_sar.c

+		}
+
+		/* Check for 12-bit resolution */
+		if (sequence->resolution == 12) {


A define here will not make this more readable.

#define RESOLUTIION_12B 12 is not more readable than sequence->resolution == 12 here

teburd · 2026-02-09T21:26:51Z

drivers/adc/adc_infineon_psoc4_sar.c

+		data->channel_configs[ch].differential = ch_cfg->differential;
+		data->channel_configs[ch].avgEn = (sequence->oversampling > 0);
+		data->channel_configs[ch].resolution =
+			(sequence->resolution == 12) ? CY_SAR_MAX_RES : CY_SAR_SUB_RES;


Ditto as above, the resolution will not be more readable from a define here

teburd · 2026-02-09T21:29:09Z

drivers/adc/adc_infineon_psoc4_sar.c

These sorts of broad "replace X with Y" comments are not helpful, #define'ing numbers is not always more readable and numbers with easily understood context (e.g. resolution = 12) won't be anymore readable by having a #define for them.

If you have suggestions on numbers that would benefit then by all means suggest it. But please do not dictate terms on how to change code without reasoning behind it.

laneb-infineon · 2026-02-09T22:59:58Z

drivers/adc/adc_infineon_psoc4_sar.c

+/* Configure ADC sample times */
+static void psoc4_configure_sample_times(struct psoc4_adc_data *data)
+{
+	data->pdl_sar_cfg.sampleTime0 = data->sample_times[0] ? data->sample_times[0] : 3;


pablofsmelo

I am withdrawing my previous requested changes as I've reconsidered my position based on the technical discussion. Please disregard my previous review and proceed without my input.

Regarding the magic numbers, I still believe that using macros or defines would significantly improve code readability and ease future maintenance, but I’ll leave the final decision to the other maintainers.

Also, I tried to resolve my previous comments but was unable to, likely due to permission constraints. I kindly request someone with the necessary privileges to resolve/close them. Thank you.

laneb-infineon · 2026-02-11T21:47:54Z

cy8ckit_041s_max Test Results

Results gathered with this commit

adc_dt

Expecting ~0.62V from readings

*** Booting Zephyr OS build v4.3.0-5842-g03122d393f9c ***
ADC reading[0]:
- adc@403a0000, channel 0: 1048 = 614 mV
- adc@403a0000, channel 1: 2094 = 613 mV
- adc@403a0000, channel 2: 2098 = 614 mV
ADC reading[1]:
- adc@403a0000, channel 0: 1045 = 612 mV
- adc@403a0000, channel 1: 2092 = 612 mV
- adc@403a0000, channel 2: 2098 = 614 mV
ADC reading[2]:
- adc@403a0000, channel 0: 1044 = 611 mV
- adc@403a0000, channel 1: 2094 = 613 mV
- adc@403a0000, channel 2: 2096 = 614 mV
ADC reading[3]:
- adc@403a0000, channel 0: 1044 = 611 mV
- adc@403a0000, channel 1: 2094 = 613 mV
- adc@403a0000, channel 2: 2096 = 614 mV

adc_sequence

Expecting ~0.62V from readings

*** Booting Zephyr OS build v4.3.0-5842-g03122d393f9c ***
ADC sequence reading [0]:
- adc@403a0000, channel 0, 5 sequence samples:
- - 2094 = 613mV
- - 2102 = 615mV
- - 2104 = 616mV
- - 2104 = 616mV
- - 2104 = 616mV
- adc@403a0000, channel 1, 5 sequence samples:
- - 1051 = 615mV
- - 1054 = 617mV
- - 1055 = 618mV
- - 1055 = 618mV
- - 1055 = 618mV
ADC sequence reading [1]:
- adc@403a0000, channel 0, 5 sequence samples:
- - 2092 = 612mV
- - 2102 = 615mV
- - 2104 = 616mV
- - 2104 = 616mV
- - 2104 = 616mV
- adc@403a0000, channel 1, 5 sequence samples:
- - 1051 = 615mV
- - 1054 = 617mV
- - 1055 = 618mV
- - 1055 = 618mV
- - 1055 = 618mV

adc_api

TESTSUITE adc_basic succeeded

------ TESTSUITE SUMMARY START ------

SUITE PASS - 100.00% [adc_basic]: pass = 6, fail = 0, skip = 0, total = 6 duration = 0.520 seconds
 - PASS - [adc_basic.test_adc_asynchronous_call] duration = 0.006 seconds
 - PASS - [adc_basic.test_adc_invalid_request] duration = 0.010 seconds
 - PASS - [adc_basic.test_adc_repeated_samplings] duration = 0.083 seconds
 - PASS - [adc_basic.test_adc_sample_one_channel] duration = 0.006 seconds
 - PASS - [adc_basic.test_adc_sample_two_channels] duration = 0.006 seconds
 - PASS - [adc_basic.test_adc_sample_with_interval] duration = 0.409 seconds

------ TESTSUITE SUMMARY END ------

===================================================================
PROJECT EXECUTION SUCCESSFUL

adc_error_cases

TESTSUITE adc_error_cases succeeded

------ TESTSUITE SUMMARY START ------

SUITE PASS - 100.00% [adc_error_cases]: pass = 7, fail = 0, skip = 0, total = 7 duration = 0.022 seconds
 - PASS - [adc_error_cases.test_adc_read_invalid_buffer] duration = 0.004 seconds
 - PASS - [adc_error_cases.test_adc_read_invalid_channels] duration = 0.003 seconds
 - PASS - [adc_error_cases.test_adc_read_invalid_oversampling] duration = 0.003 seconds
 - PASS - [adc_error_cases.test_adc_read_invalid_resolution] duration = 0.003 seconds
 - PASS - [adc_error_cases.test_adc_read_not_configured_channel] duration = 0.004 seconds
 - PASS - [adc_error_cases.test_adc_setup_invalid_gain] duration = 0.002 seconds
 - PASS - [adc_error_cases.test_adc_setup_invalid_reference] duration = 0.003 seconds

------ TESTSUITE SUMMARY END ------

===================================================================
PROJECT EXECUTION SUCCESSFUL

laneb-infineon · 2026-02-11T21:49:19Z

cy8cproto_041tp Test Results

Results gathered with this commit

adc_dt

Expecting ~0.62V from readings

*** Booting Zephyr OS build v4.3.0-5842-g03122d393f9c ***
ADC reading[0]:
- adc@403a0000, channel 0: 2114 = 619 mV
- adc@403a0000, channel 1: 1045 = 612 mV
ADC reading[1]:
- adc@403a0000, channel 0: 2114 = 619 mV
- adc@403a0000, channel 1: 1046 = 612 mV
ADC reading[2]:
- adc@403a0000, channel 0: 2114 = 619 mV
- adc@403a0000, channel 1: 1044 = 611 mV
ADC reading[3]:
- adc@403a0000, channel 0: 2114 = 619 mV
- adc@403a0000, channel 1: 1046 = 612 mV

adc_sequence

Expecting ~0.62V from readings

*** Booting Zephyr OS build v4.3.0-5842-g03122d393f9c ***
ADC sequence reading [0]:
- adc@403a0000, channel 0, 5 sequence samples:
- - 2100 = 615mV
- - 2120 = 621mV
- - 2118 = 620mV
- - 2104 = 616mV
- - 2116 = 619mV
- adc@403a0000, channel 1, 5 sequence samples:
- - 1041 = 609mV
- - 1051 = 615mV
- - 1061 = 621mV
- - 1052 = 616mV
- - 1055 = 618mV
ADC sequence reading [1]:
- adc@403a0000, channel 0, 5 sequence samples:
- - 2108 = 617mV
- - 2108 = 617mV
- - 2126 = 622mV
- - 2118 = 620mV
- - 2124 = 622mV
- adc@403a0000, channel 1, 5 sequence samples:
- - 1046 = 612mV
- - 1054 = 617mV
- - 1054 = 617mV
- - 1053 = 616mV
- - 1050 = 615mV

adc_api

TESTSUITE adc_basic succeeded

------ TESTSUITE SUMMARY START ------

SUITE PASS - 100.00% [adc_basic]: pass = 6, fail = 0, skip = 0, total = 6 duration = 0.520 seconds
 - PASS - [adc_basic.test_adc_asynchronous_call] duration = 0.006 seconds
 - PASS - [adc_basic.test_adc_invalid_request] duration = 0.010 seconds
 - PASS - [adc_basic.test_adc_repeated_samplings] duration = 0.083 seconds
 - PASS - [adc_basic.test_adc_sample_one_channel] duration = 0.006 seconds
 - PASS - [adc_basic.test_adc_sample_two_channels] duration = 0.006 seconds
 - PASS - [adc_basic.test_adc_sample_with_interval] duration = 0.409 seconds

------ TESTSUITE SUMMARY END ------

===================================================================
PROJECT EXECUTION SUCCESSFUL

adc_error_cases

TESTSUITE adc_error_cases succeeded

------ TESTSUITE SUMMARY START ------

SUITE PASS - 100.00% [adc_error_cases]: pass = 7, fail = 0, skip = 0, total = 7 duration = 0.022 seconds
 - PASS - [adc_error_cases.test_adc_read_invalid_buffer] duration = 0.004 seconds
 - PASS - [adc_error_cases.test_adc_read_invalid_channels] duration = 0.003 seconds
 - PASS - [adc_error_cases.test_adc_read_invalid_oversampling] duration = 0.003 seconds
 - PASS - [adc_error_cases.test_adc_read_invalid_resolution] duration = 0.003 seconds
 - PASS - [adc_error_cases.test_adc_read_not_configured_channel] duration = 0.004 seconds
 - PASS - [adc_error_cases.test_adc_setup_invalid_gain] duration = 0.002 seconds
 - PASS - [adc_error_cases.test_adc_setup_invalid_reference] duration = 0.003 seconds

------ TESTSUITE SUMMARY END ------

===================================================================
PROJECT EXECUTION SUCCESSFUL

teburd

Happy to see a well done PR, its great to see the tests results here as well showing it works. A few comments, one of which I know will require a bit of finagling to work out. The other trivial.

I think we can safely say you have incorporated #101600 into this and given co-authorship in the commits, so its safe for @Deepika-aerlync to close that PR whenever comfortable and we can move forward with this one PR for the sar-adc support.

Thank you @Deepika-aerlync and others for the hard work!

teburd · 2026-02-11T21:58:18Z

drivers/adc/adc_infineon_psoc4_sar.c

+		.vref_mv = DT_INST_PROP(n, vref_mv),                                               \
+		.clk_dst = (en_clk_dst_t)DT_INST_PROP(n, clk_dst),                                 \
+	};                                                                                         \
+	static const struct adc_driver_api adc_psoc4_driver_api_##n = {                            \


This should use DEVICE_API
https://github.com/zephyrproject-rtos/zephyr/blob/main/include/zephyr/device.h#L1343

teburd · 2026-02-11T22:42:35Z

dts/bindings/adc/infineon,psoc4-sar-adc.yaml

+# SPDX-License-Identifier: Apache-2.0
+
+description: |
+  Infineon PSOC4 SAR ADC


Rather than tying this IP block to a part family (PSOC4) we should tie it to a version of the IP like the PDL drivers itself do.

We can do this with a compatible like (infineon,sar-adc-v2), an example here would be ST's I2C IP versioning

https://github.com/zephyrproject-rtos/zephyr/blob/main/dts/bindings/i2c/st%2Cstm32-i2c-v1.yaml
https://github.com/zephyrproject-rtos/zephyr/blob/main/drivers/i2c/Kconfig.stm32#L14

OR by adding (in case the IP is similar enough to others) adding version property

https://github.com/zephyrproject-rtos/zephyr/blob/main/dts/bindings/dma/nxp%2Cmcux-edma.yaml#L73

Which then gets use in Kconfig and/or code to vary things based on the version.

No strong preference on my part. The versioned compatible I think matches well with the PDL which also differentiates headers with -vX.h

https://github.com/zephyrproject-rtos/hal_infineon/tree/master/mtb-pdl-cat2/devices/include/ip

Deepika-aerlync · 2026-02-12T15:05:48Z

Happy to see a well done PR, its great to see the tests results here as well showing it works. A few comments, one of which I know will require a bit of finagling to work out. The other trivial.

I think we can safely say you have incorporated #101600 into this and given co-authorship in the commits, so its safe for @Deepika-aerlync to close that PR whenever comfortable and we can move forward with this one PR for the sar-adc support.

Thank you @Deepika-aerlync and others for the hard work!

PR #101600 has been closed. Thanks! @teburd

jsbatch · 2026-02-12T19:56:31Z

drivers/adc/adc_infineon_psoc4_sar.c

+#include <zephyr/devicetree.h>
+#include <zephyr/logging/log.h>
+#include <zephyr/sys/util.h>
+#include <zephyr/drivers/clock_control/clock_control_ifx_cat1.h>


It might be good to to add:

#include <infineon_kconfig.h>

This is consistent with other drivers, and will help ensure some PDL macros are defined correctly, such as CY_IP_M0S8PASS4A_SAR_VERSION.

jsbatch · 2026-02-12T19:56:43Z

drivers/adc/adc_infineon_psoc4_sar.c

+				LOG_ERR("Invalid SARMUX pin number: %d", ch_cfg->vplus);
+				return;


This function has several error return paths, but the function is returning void so there is no indication that the function actually failed. Would it make sense to add an error code output here so the caller knows?

jsbatch · 2026-02-12T19:59:54Z

drivers/adc/adc_infineon_psoc4_sar.c

+	}
+
+	LOG_ERR("Invalid pin number %u for routing determination", pin);
+	return PSOC4_ADC_ROUTE_SARMUX;  /* Fallback */


It might make sense to return some kind of error code here to indicate an unsupported/invalid routing path.

jsbatch · 2026-02-12T20:02:00Z

drivers/adc/adc_infineon_psoc4_sar.c

+			} else if (data->channel_cfg[ch].vplus_routing ==
+				   data->channel_cfg[ch].vminus_routing) {
+				routing_mismatch = true;
+			}


Should this be routing_mismatch = false? It seems like you would want the routing to be the same for positive and negative channels.

Simplified logic, changed.

drivers/adc/adc_infineon_psoc4_sar.c

jsbatch · 2026-02-12T20:18:52Z

drivers/adc/adc_infineon_psoc4_sar.c

+			return -EINVAL;
+		}
+
+		if (data->channel_cfg[ch].vminus_routing == PSOC4_ADC_ROUTE_SARMUX) {


I don't see any case covering vminus_routing == PSOC4_ADC_ROUTE_SARBUS. Is this not supported in differential mode?

jsbatch · 2026-02-12T20:23:51Z

samples/drivers/adc/adc_dt/boards/cy8ckit_041s_max.overlay

+		zephyr,input-positive = <2>;  /* SARMUX pin 2 = P2.2 (V+) */
+		zephyr,input-negative = <3>;  /* SARMUX pin 3 = P2.3 (V-) */


Throughout the overlays in this PR, input-positive and input-negative are defined differently between the 4100tp and 4100smax boards. I think either is fine, but it'd be nice if we were consistent with which approach we use.

Add driver for the PSOC4 SAR ADC peripheral with device tree binding. The driver supports: - Single-ended and differential channel configuration - Configurable resolution (8-12 bits) - Multiple voltage reference sources (internal, VDDA, VDDA/2, external) - Hardware compensation for SAR v2/v3 single-ended channel limitation - Interrupt-driven conversion completion - Integration with peripheral clock control The driver includes a compile-time per-instance API structure to correctly report reference voltage to the ADC framework for accurate raw-to-millivolts conversion. Tested on CY8CKIT-041S-MAX and CY8CPROTO-041TP boards. Signed-off-by: Braeden Lane <[email protected]> Co-authored-by: Deepika R <[email protected]> Co-authored-by: Sayooj K Karun <[email protected]>

Extend the Infineon peripheral clock control driver to support ADC peripherals. Adds IFX_RSC_ADC resource type handling and PSOC4-specific clock destination initialization (set to 0 as PSOC4 peripherals manage their own clock routing). Signed-off-by: Braeden Lane <[email protected]> Co-authored-by: Deepika R <[email protected]> Co-authored-by: Sayooj K Karun <[email protected]>

Enable the SAR ADC peripheral on CY8CKIT-041S-MAX and CY8CPROTO-041TP boards: - Add ADC node to psoc4100smax.dtsi and psoc4100tp.dtsi - Configure clk-dst for peripheral clock routing - 041S-MAX: PCLK_PASS0_CLOCK_SAR (0x12) - 041TP: PCLK_PASS0_CLOCK_SAR (0xc) - Reference peri_clk_div4 for ADC clock source - Enable peri_clk_div4 in board common devicetree includes Signed-off-by: Braeden Lane <[email protected]> Co-authored-by: Deepika R <[email protected]> Co-authored-by: Sayooj K Karun <[email protected]>

Add device tree overlays for ADC samples and tests on CY8CKIT-041S-MAX and CY8CPROTO-041TP boards. Configures ADC channels with pinctrl for analog inputs on available header pins. Includes single-ended and differential channel configurations demonstrating various ADC features. Added overlays for: - samples/drivers/adc/adc_dt - samples/drivers/adc/adc_sequence - tests/drivers/adc/adc_api - tests/drivers/adc/adc_error_cases Signed-off-by: Braeden Lane <[email protected]> Co-authored-by: Deepika R <[email protected]> Co-authored-by: Sayooj K Karun <[email protected]>

sonarqubecloud · 2026-02-12T22:33:35Z

Quality Gate passed

Issues
9 New issues
0 Accepted issues

Measures
0 Security Hotspots
0.0% Coverage on New Code
0.0% Duplication on New Code

See analysis details on SonarQube Cloud

zephyrbot requested review from JarmouniA, ZhaoxiangJin, anangl, billwatersiii, jsbatch, kartben, mcatee-infineon, nashif, nordic-krch, sreeramIfx, talih0 and teburd February 4, 2026 02:11

zephyrbot assigned sreeramIfx and teburd Feb 4, 2026

laneb-infineon force-pushed the cy8ckit_041s_max_adc branch from d8c406d to 90047a3 Compare February 9, 2026 20:03

teburd reviewed Feb 9, 2026

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laneb-infineon force-pushed the cy8ckit_041s_max_adc branch from 90047a3 to 4afadd0 Compare February 9, 2026 22:59

laneb-infineon commented Feb 9, 2026

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laneb-infineon force-pushed the cy8ckit_041s_max_adc branch 2 times, most recently from a2ed841 to 0d56b99 Compare February 10, 2026 00:22

pablofsmelo reviewed Feb 10, 2026

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laneb-infineon force-pushed the cy8ckit_041s_max_adc branch 3 times, most recently from 10baefb to 9bd0820 Compare February 11, 2026 21:44

laneb-infineon changed the title ~~boards: cy8ckit_041s_max: adc support~~ drivers: adc: Add Infineon PSOC4 SAR ADC support Feb 11, 2026

teburd requested changes Feb 11, 2026

View reviewed changes

jsbatch requested changes Feb 12, 2026

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laneb-infineon force-pushed the cy8ckit_041s_max_adc branch from 9bd0820 to 3a9a68e Compare February 12, 2026 21:14

laneb-infineon and others added 4 commits February 12, 2026 14:29

laneb-infineon force-pushed the cy8ckit_041s_max_adc branch from 3a9a68e to 485347d Compare February 12, 2026 22:29

		LOG_ERR("Invalid SARMUX pin number: %d", ch_cfg->vplus);
		return;

		zephyr,input-positive = <2>; /* SARMUX pin 2 = P2.2 (V+) */
		zephyr,input-negative = <3>; /* SARMUX pin 3 = P2.3 (V-) */

drivers: adc: Add Infineon PSOC4 SAR ADC support #103453

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drivers: adc: Add Infineon PSOC4 SAR ADC support #103453

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laneb-infineon commented Feb 4, 2026 • edited Loading Uh oh! There was an error while loading. Please reload this page.

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laneb-infineon commented Feb 11, 2026

cy8ckit_041s_max Test Results

adc_dt

adc_sequence

adc_api

adc_error_cases

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laneb-infineon commented Feb 11, 2026

cy8cproto_041tp Test Results

adc_dt

adc_sequence

adc_api

adc_error_cases

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Deepika-aerlync commented Feb 12, 2026

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jsbatch Feb 12, 2026 • edited Loading Uh oh! There was an error while loading. Please reload this page.

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sonarqubecloud bot commented Feb 12, 2026

Quality Gate passed

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laneb-infineon commented Feb 4, 2026 •

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