stm32: QSPI NOR flash controller support #30864

erwango · 2020-12-18T13:16:35Z

Add dma based QSPI NOR flash controller for stm32l4 and stm32wb series.

Driver configures both NOR flash and also QSPI hardware block.
Forked from #25806 with addition of optional DMA support and reworked to make use jesd216 library.

Uses #31303

github-actions · 2020-12-18T13:17:34Z

The following projects have a revision update in this Pull Request:

Name	Old Revision	New Revision
hal_stm32	zephyrproject-rtos/hal_stm32@`5a10f27`	zephyrproject-rtos/hal_stm32@`cc8731d` (master)

Note: This message is automatically posted and updated by the Manifest GitHub Action.

erwango · 2020-12-18T13:33:34Z

^^ @giansta, @r2r0

erwango · 2020-12-18T13:55:25Z

^^@mtahirbutt @hjuul

pabigot

Preliminary comments. I hope to have hardware to test this within the next two weeks.

The spi-nor sample and probably at least one flash subsystem sample should be updated to support a board (preferably B-L475E-IOT01A since that's what I've got coming...).

dts/bindings/qspi/st,stm32-qspi.yaml

pabigot · 2020-12-18T15:58:41Z

drivers/dma/dma_stm32.c

 		stream->dma_callback(dev, stream->user_data, callback_arg, 0);
-	} else if (dma_stm32_is_ht_active(dma, id)) {
-		dma_stm32_clear_ht(dma, id);
+		dma_stm32_clear_tc(dma, id);


The change to clear tc after the callback instead of before is intentional? Depending on what that means I could see this introducing a race condition and lost data (e.g. a second event comes in during/after the callback and is discarded).

Just want to be sure.

The other way round didn't work with my purpose as DMA HAL needs flags to be still available when the callback is called to work as expected.
This being said, I might need to test more thoroughly other cases to be sure I didn't break anything. In which case, I would have to use this behavior only in case of "DMA channel override"

is this still an issue?

is this still an issue?

For sure I can't make it work the other way round due to use of HAL API. So this is still needed, yes.

I meant, did you still need to test more thoroughly, or are you satisfied that we can ignore the change?

It was tested as much as I could and no issue was find. Anyway, I've just protected this behavior so we should be safe on that front now.

drivers/dma/dma_stm32.c

drivers/flash/spi_nor.h

erwango · 2020-12-18T16:38:08Z

Txs @pabigot for the initial review. Will take those into account.

The spi-nor sample and probably at least one flash subsystem sample should be updated to support a board (preferably B-L475E-IOT01A since that's what I've got coming...).

I agree that we need a way to test this driver in CI (or at least compile it). I think I can find a way to tweak samples/drivers/flash_shell to achieve this.
Though, I'm not sure about the spi-nor sample, do you mean samples/drivers/jesd216 ?

EDIT: Found it: spi-nor sample is samples/drivers/spi_flash/src/main.c.

drivers/flash/flash_stm32_qspi.c

hjuul · 2020-12-21T10:22:53Z

drivers/flash/flash_stm32_qspi.c

+	/* TODO: This init is limited to G0/G4/L0/L4/L5/WB */
+	hdma.Init.PeriphDataAlignment = table_p_size[index];
+	hdma.Init.MemDataAlignment = table_m_size[index];
+	hdma.Init.Request = dma_cfg.dma_slot;


I was trying to make this work for stm32f7, but get a compile error here when building samples/drivers/flash_shell.

If you could extend support to DMA_STM32_V1 also I can help to verify it on stm32f746g_disco and stm32f769i_disco boards.

If not, perhaps use #ifndef CONFIG_DMA_STM32_V1 or similar to make it compile.

In case you choose to add this, here's my attempt at dts files for stm32f746i_disco. I can also make such patch for stm32f769g_disco if you like.

boards/arm/stm32f756g_disco/stm32f756_disco.dts:

&dma2 { status = "okay"; }; &quadspi { pinctrl-0 = <&quadspi_clk_pb2 &quadspi_bk1_ncs_pb6 &quadspi_bk1_io0_pd11 &quadspi_bk1_io1_pd12 &quadspi_bk1_io2_pe2 &quadspi_bk1_io3_pd13>; dmas = <&dma2 7 3 0x0000 0x03>; dma-names = "tx_rx"; status = "okay"; n26q128a13ef840e: qspi-nor-flash@0 { compatible = "st,stm32-qspi-nor"; label = "N25Q128A13EF840E"; reg = <0>; spi-max-frequency = <108000000>; /* 128 Megabits = 16 Megabytes */ size = <0x8000000>; status = "okay"; }; };

dts/arm/st/f7/stm32f7.dtsi:

quadspi: quadspi@a0001000 { compatible = "st,stm32-qspi"; #address-cells = <1>; #size-cells = <0>; reg = <0xa0001000 0x34>; interrupts = <92 0>; clocks = <&rcc STM32_CLOCK_BUS_AHB3 0x00000002>; status = "disabled"; label = "QUADSPI"; };

@hjuul thanks for your interest. I'll try to add F7 support later this week.

Not much time to look at that right now, but the following should get things compile for F7:

#ifdef CONFIG_DMA_STM32_V1 hdma.Instance = __LL_DMA_GET_STREAM_INSTANCE(dev_data->dma.reg, dev_data->dma.channel); hdma.Init.Channel = dma_cfg.dma_slot; #else hdma.Instance = __LL_DMA_GET_CHANNEL_INSTANCE(dev_data->dma.reg, dev_data->dma.channel-1); hdma.Init.Request = dma_cfg.dma_slot; #endif /* CONFIG_DMA_STM32_V1 */

FRASTM

could the commit cac002c7a013549fd7b1324d4f9fb65ba8e981fa be another PR ?

erwango · 2021-01-14T08:19:06Z

could the commit cac002c be another PR ?

ok, right. Created #31303

dts/arm/st/l4/stm32l4.dtsi

drivers/flash/flash_stm32_qspi.c

In preparation for QSPI DMA mode: -Add a possibility to override driver by the HAL DMA. In that case stream is set as busy and no configuration nor treatment is done. In case of interrupt, flags clearing is let to HAL. -Treat Half Transfer interrupt prior to Transfer Complete for the cases were both IRQ are both raised at the time IRQ handler is called Signed-off-by: Erwan Gouriou <[email protected]>

Add support for DMA based STM32 QSPI NOR flash controller. Driver configures both NOR flash and also QSPI hardware block. Reuses existing jesd216 library. QSPI hardware block handling is done through the use of Cube HAL API. This requires the use of HAL interface also for DMA besides zephyr DMA driver. Zephyr DMA driver is used only for IRQ routing while HAL driver handles the IP block. To achieve this it is required to: -Configure both Cube and Zephyr drivers at init. -Inform Zephyr driver that current channel handling will be done by another instance and only a limited configuration should be done. For this last part, a unused parameter is overridden in order to transmit the information. Signed-off-by: Erwan Gouriou <[email protected]> Signed-off-by: Piotr Mienkowski <[email protected]>

Add device tree description for qspi node on STM32L4 and signals on whole family. Signed-off-by: Erwan Gouriou <[email protected]> Signed-off-by: Piotr Mienkowski <[email protected]>

Configure QSPI NOR support and MX25R6435F on disco_l475_iot1 board. Set MX25R6435F as flash controller and arrange partitions to take newlay available space into account. Signed-off-by: Erwan Gouriou <[email protected]>

Enable using st,stm32-qspi-nor compatible driver for this sample. Signed-off-by: Erwan Gouriou <[email protected]>

Add disco_l475_iot1 as build platform for this sample Signed-off-by: Erwan Gouriou <[email protected]>

Add dt_node_has_prop function to query the presence of 'prop' for given node label. Signed-off-by: Erwan Gouriou <[email protected]>

In order to ease reuse on other series, set DMA as optional and use IT if no DMA channel is specified in the qspi node. Tested on disco_l475_iot1 Signed-off-by: Erwan Gouriou <[email protected]>

Add quadspi support to stm32wb series. Tested on nucleo_wb55rg + nor flash. Signed-off-by: Erwan Gouriou <[email protected]>

fzawadiak · 2021-01-14T13:50:26Z

DTS node for H7

			compatible = "st,stm32-qspi";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x52005000 0x400>;
			interrupts = <92 0>;
			clocks = <&rcc STM32_CLOCK_BUS_AHB3 0x00004000>;
			status = "disabled";
			label = "QUADSPI";
		};

And for stm32h747i_disco_m7.dts (bk2 pins can be removed, but they are there for dual flash)

&quadspi {
	pinctrl-0 = <&quadspi_clk_pb2
		     &quadspi_bk1_ncs_pg6
		     &quadspi_bk1_io0_pd11 &quadspi_bk1_io1_pf9
		     &quadspi_bk1_io2_pf7 &quadspi_bk1_io3_pf6
		     &quadspi_bk2_io0_ph2 &quadspi_bk2_io1_ph3
		     &quadspi_bk2_io2_pg9 &quadspi_bk2_io3_pg14>;

	status = "okay";

	mt25tl01g: qspi-nor-flash@0 {
		compatible = "st,stm32-qspi-nor";
		label = "MT25TL01G";
		reg = <0>;
		spi-max-frequency = <50000000>;
		/* Dual 512 MBits => Dual 64MBytes => 128MBytes */
		size = <0x40000000>;
		status = "okay";
	};
};

erwango · 2021-01-14T15:51:05Z

DTS node for H7

Thanks. I had a test, this is working but I'm getting MDMA HAL warnings (even when not using DMA). If I manage to get rid of thoss, I'll include support in current PR. Otherwise this will have to wait a bit.

pabigot

Still want JESD216 API support but this is good and works for me on small devices. Thanks.

erwango requested review from ABOSTM, galak, gmarull, lowlander and pabigot December 18, 2020 13:16

erwango requested review from FRASTM, cybertale, nashif and nvlsianpu as code owners December 18, 2020 13:16

github-actions bot added area: Boards area: Devicetree area: Devicetree Binding PR modifies or adds a Device Tree binding area: Documentation area: Modules platform: STM32 ST Micro STM32 manifest west manifest-hal_stm32 DNM This PR should not be merged (Do Not Merge) labels Dec 18, 2020

erwango force-pushed the dev_qspi_dma_stm32 branch 2 times, most recently from a29bbbd to b8c3c32 Compare December 18, 2020 13:32

pabigot reviewed Dec 18, 2020

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drivers/flash/flash_stm32_qspi.c Show resolved Hide resolved

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pabigot mentioned this pull request Dec 29, 2020

refactor devicetree binding support for JESD216 devices #31042

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erwango removed platform: NXP NXP platform: Silabs Silicon Labs west labels Jan 13, 2021

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FRASTM reviewed Jan 14, 2021

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erwango mentioned this pull request Jan 14, 2021

scripts/Kconfig: Add dt_node_has_prop Kconfig function #31303

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erwango added 9 commits January 14, 2021 11:31

dts: Add stm32 quadspi support on L4 series

72a6dff

Add device tree description for qspi node on STM32L4 and signals on whole family. Signed-off-by: Erwan Gouriou <[email protected]> Signed-off-by: Piotr Mienkowski <[email protected]>

boards: disco_l475_iot1: Enable support for MX25R6435F QSPI NOR

de2b849

Configure QSPI NOR support and MX25R6435F on disco_l475_iot1 board. Set MX25R6435F as flash controller and arrange partitions to take newlay available space into account. Signed-off-by: Erwan Gouriou <[email protected]>

samples: spi_flash: Add compatibility with st,stm32-qspi-nor

851b3d7

Enable using st,stm32-qspi-nor compatible driver for this sample. Signed-off-by: Erwan Gouriou <[email protected]>

samples/subsys: littlefs: Add disco_l475_iot1

6224cb3

Add disco_l475_iot1 as build platform for this sample Signed-off-by: Erwan Gouriou <[email protected]>

scripts/Kconfig: Add dt_node_has_prop Kconfig function

e819535

Add dt_node_has_prop function to query the presence of 'prop' for given node label. Signed-off-by: Erwan Gouriou <[email protected]>

drivers/flash: flash_stm32_qspi: Set DMA as optional

8370b23

In order to ease reuse on other series, set DMA as optional and use IT if no DMA channel is specified in the qspi node. Tested on disco_l475_iot1 Signed-off-by: Erwan Gouriou <[email protected]>

dts/arm/st: wb: Add quadspi node

cd48c83

Add quadspi support to stm32wb series. Tested on nucleo_wb55rg + nor flash. Signed-off-by: Erwan Gouriou <[email protected]>

erwango force-pushed the dev_qspi_dma_stm32 branch from dcd0dad to cd48c83 Compare January 14, 2021 10:31

erwango requested a review from carlescufi as a code owner January 14, 2021 10:31

github-actions bot added the area: API Changes to public APIs label Jan 14, 2021

FRASTM approved these changes Jan 14, 2021

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nashif merged commit 7f39d74 into zephyrproject-rtos:master Jan 15, 2021

MaureenHelm mentioned this pull request Jan 15, 2021

drivers: flash: Introduce i.MX RT FlexSPI driver #31034

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hjuul mentioned this pull request Jan 18, 2021

drivers/flash: stm32: Extend qspi-nor support to F7 series #31405

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erwango deleted the dev_qspi_dma_stm32 branch January 27, 2022 13:37

FRASTM mentioned this pull request Oct 30, 2023

tests: drivers: flash stm32l4 RDP on internal flash partition #64569

Merged

stm32: QSPI NOR flash controller support #30864

stm32: QSPI NOR flash controller support #30864

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