drivers: flash: update nrf_qspi_nor with JESD216 support

doc/releases/release-notes-2.5.rst

@@ -167,6 +167,9 @@ Drivers and Sensors
 
 * Flash
 
+  * CONFIG_NORDIC_QSPI_NOR_QE_BIT has been removed.  The
+    quad-enable-requirements devicetree property should be used instead.
+
 * GPIO
 
 * Hardware Info

drivers/flash/Kconfig.nordic_qspi_nor

@@ -5,16 +5,13 @@ menuconfig NORDIC_QSPI_NOR
 	bool "QSPI NOR Flash"
 	select FLASH_HAS_DRIVER_ENABLED
 	select NRFX_QSPI
+	select FLASH_JESD216
 	depends on HAS_HW_NRF_QSPI
 	help
 	  Enable support for nrfx QSPI driver with EasyDMA.
 
 if NORDIC_QSPI_NOR
 
-config NORDIC_QSPI_NOR_QE_BIT
-	int "Quad Enable bit number in Status Register"
-	default 6
-
 config NORDIC_QSPI_NOR_INIT_PRIORITY
 	int
 	default 80

drivers/flash/jesd216.c

@@ -286,3 +286,44 @@ int jesd216_bfp_decode_dw14(const struct jesd216_param_header *php,
 
 	return 0;
 }
+
+int jesd216_bfp_decode_dw15(const struct jesd216_param_header *php,
+			    const struct jesd216_bfp *bfp,
+			    struct jesd216_bfp_dw15 *res)
+{
+	/* DW15 introduced in JESD216A */
+	if (php->len_dw < 15) {
+		return -ENOTSUP;
+	}
+
+	uint32_t dw15 = sys_le32_to_cpu(bfp->dw10[5]);
+
+	res->hold_reset_disable = (dw15 & BIT(23)) != 0U;
+	res->qer = (dw15 >> 20) & 0x07;
+	res->entry_044 = (dw15 >> 16) & 0x0F;
+	res->exit_044 = (dw15 >> 10) & 0x3F;
+	res->support_044 = (dw15 & BIT(9)) != 0U;
+	res->enable_444 = (dw15 >> 4) & 0x1F;
+	res->disable_444 = (dw15 >> 0) & 0x0F;
+
+	return 0;
+}
+
+int jesd216_bfp_decode_dw16(const struct jesd216_param_header *php,
+			    const struct jesd216_bfp *bfp,
+			    struct jesd216_bfp_dw16 *res)
+{
+	/* DW16 introduced in JESD216A */
+	if (php->len_dw < 16) {
+		return -ENOTSUP;
+	}
+
+	uint32_t dw16 = sys_le32_to_cpu(bfp->dw10[6]);
+
+	res->enter_4ba = (dw16 >> 24) & 0xFF;
+	res->exit_4ba = (dw16 >> 14) & 0x3FF;
+	res->srrs_support = (dw16 >> 8) & 0x3F;
+	res->sr1_interface = (dw16 >> 0) & 0x7F;
+
+	return 0;
+}

drivers/flash/jesd216.h

@@ -383,12 +383,12 @@ int jesd216_bfp_decode_dw11(const struct jesd216_param_header *php,
 			    const struct jesd216_bfp *bfp,
 			    struct jesd216_bfp_dw11 *res);
 
-/* Decode data from JESD216 DW14 */
+/* Decoded data from JESD216 DW14 */
 struct jesd216_bfp_dw14 {
-	/* Instruct used to enter deep power-down */
+	/* Instruction used to enter deep power-down */
 	uint8_t enter_dpd_instr;
 
-	/* Instruct used to exit deep power-down */
+	/* Instruction used to exit deep power-down */
 	uint8_t exit_dpd_instr;
 
 	/* Bits defining ways busy status may be polled. */
@@ -415,4 +415,94 @@ int jesd216_bfp_decode_dw14(const struct jesd216_param_header *php,
 			    const struct jesd216_bfp *bfp,
 			    struct jesd216_bfp_dw14 *res);
 
+/* DW15 Quad Enable Requirements specifies status register QE bits.
+ *
+ * Two common configurations are summarized; see the specification for
+ * full details of how to use these values.
+ */
+enum jesd216_dw15_qer_type {
+	/* No QE status required for 1-1-4 or 1-4-4 mode */
+	JESD216_DW15_QER_NONE = 0,
+	JESD216_DW15_QER_S2B1v1 = 1,
+	/* Bit 6 of SR byte must be set to enable 1-1-4 or 1-4-4 mode.
+	 * SR is one byte.
+	 */
+	JESD216_DW15_QER_S1B6 = 2,
+	JESD216_DW15_QER_S2B7 = 3,
+	JESD216_DW15_QER_S2B1v4 = 4,
+	JESD216_DW15_QER_S2B1v5 = 5,
+	JESD216_DW15_QER_S2B1v6 = 6,
+};
+
+/* Decoded data from JESD216 DW15 */
+struct jesd216_bfp_dw15 {
+	/* If true clear NVECR bit 4 to disable HOLD/RESET */
+	bool hold_reset_disable: 1;
+	/* Encoded jesd216_qer_type */
+	unsigned int qer: 3;
+	/* 0-4-4 mode entry method */
+	unsigned int entry_044: 4;
+	/* 0-4-4 mode exit method */
+	unsigned int exit_044: 6;
+	/* True if 0-4-4 mode is supported */
+	bool support_044: 1;
+	/* 4-4-4 mode enable sequences */
+	unsigned int enable_444: 5;
+	/* 4-4-4 mode disable sequences */
+	unsigned int disable_444: 4;
+};
+
+/* Get data from BFP DW15.
+ *
+ * @param php pointer to the BFP header.
+ *
+ * @param bfp pointer to the BFP table.
+ *
+ * @param res pointer to where to store the decoded data.
+ *
+ * @retval -ENOTSUP if this information is not available from this BFP table.
+ * @retval 0 on successful storage into @c *res.
+ */
+int jesd216_bfp_decode_dw15(const struct jesd216_param_header *php,
+			    const struct jesd216_bfp *bfp,
+			    struct jesd216_bfp_dw15 *res);
+
+/* Decoded data from JESD216_DW16 */
+struct jesd216_bfp_dw16 {
+	/* Bits specifying supported modes of entering 4-byte
+	 * addressing.
+	 */
+	unsigned int enter_4ba: 8;
+
+	/* Bits specifying supported modes of exiting 4-byte
+	 * addressing.
+	 */
+	unsigned int exit_4ba: 10;
+
+	/* Bits specifying the soft reset and rescue sequence to
+	 * restore the device to its power-on state.
+	 */
+	unsigned int srrs_support: 6;
+
+	/* Bits specifying how to modify status register 1, and which
+	 * bits are non-volatile.
+	 */
+	unsigned int sr1_interface: 7;
+};
+
+/* Get data from BFP DW16.
+ *
+ * @param php pointer to the BFP header.
+ *
+ * @param bfp pointer to the BFP table.
+ *
+ * @param res pointer to where to store the decoded data.
+ *
+ * @retval -ENOTSUP if this information is not available from this BFP table.
+ * @retval 0 on successful storage into @c *res.
+ */
+int jesd216_bfp_decode_dw16(const struct jesd216_param_header *php,
+			    const struct jesd216_bfp *bfp,
+			    struct jesd216_bfp_dw16 *res);
+
 #endif /* ZEPHYR_DRIVERS_FLASH_JESD216_H_ */