drivers/apbuart: add TX FIFO interrupt support #31154
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This commit aligns the GRLIB APBUART driver with the Zephyr UART API and fixes an issue where TX interrupt could previously be lost. It was typically seen during interactive operation in the Zephyr shell. There is an expectation in the Zephyr UART API that TX ready (i.e. TX buffer space available) interrupt is a level interrupt, i.e. always active while there's TX buffer space available. In particular, there's an expectation that after uart_irq_tx_enable(), the TX interrupt will immediately fire (assuming free TX buffer space is available). The APBUART "Transmitter interrupt (CTRL_TI)" does not directly fulfill this expectation because it is edge triggered and fires when the TX holding register moves from being non-empty to empty. The solution is to "bootstrap" interrupt processing by calling user-defined ISR in irq_tx_enable(). This fix is similar to commit 49bb163 ("drivers: serial: uart_cmsdk_apb: Fix interrupt-driven operation"). Signed-off-by: Martin Åberg <[email protected]>
Use the UART interrupt support. Signed-off-by: Martin Åberg <[email protected]>
Use TX FIFO level interrupt if available in hardware. It matches the
Zephyr UART API and avoids "bootstrapping" which is needed when using
the TX edge interrupt ("TI"). TX FIFO has room for up to 32 characters
and will typically reduce the number of interrupts.
Details:
APBUART can be synthesized with or without support for TX/RX FIFO.
Edge interrupts which fire when TX holding register changes and RX data
available are always available, independent of the FIFO configuration.
If FIFO is made available at synthesis time, two additional interrupts
become available: TX FIFO half-empty and RX FIFO half-full. These
are level interrupts.
Signed-off-by: Martin Åberg <[email protected]>
dcpleung
approved these changes
Jan 8, 2021
ghost
added this to the
galak
approved these changes
Jan 21, 2021
galak
reviewed
Jan 21, 2021
| if (DEV_DATA(dev)->usefifo) { | ||
| /* Transmitter FIFO full flag is available. */ | ||
| for ( | ||
| i = 0; |
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We've increased the line length, so maybe just put this all on one line now.
dcpleung
approved these changes
Jan 21, 2021
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Use TX FIFO level interrupt if available in hardware. It matches the
Zephyr UART API and avoids "bootstrapping" which is needed when using
the TX edge interrupt ("TI"). TX FIFO has room for up to 32 characters
and will typically reduce the number of interrupts.
The PR also contains a fix for using interrupts with APBUART
implementaitons without FIFO.
Tested with QEMU, TSIM and LEON3 hardware.