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Add initial pinctrl implementation for RT1062 #41810

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Add initial pinctrl implementation for RT1062 #41810

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0e01612
west.yml: Update to pull in pinctrl header from NXP HAL
danieldegrasse Jan 13, 2022
f04d1ca
dts: pinctrl: add dts binding for nxp mcux rt1xxx
hakehuang Dec 24, 2021
d1867cd
dts: binding: add pinctrl node to sai and lpuart
hakehuang Dec 24, 2021
8de734e
dts: binding: add pinctrl binding header files
hakehuang Dec 24, 2021
b10c100
soc: kconfig: pinctrl select in rt1xxx series
hakehuang Dec 24, 2021
2267254
dts: pinctrl: add pinctrl and gpr for rt1xxx
hakehuang Dec 24, 2021
7aa2340
drivers: pinctrl: add mcux_rt pinctrl driver
hakehuang Dec 24, 2021
7160d4f
driver: lpuart: add pinctrl support in mcux lpuart
hakehuang Dec 24, 2021
f300ff4
driver: sai: add pinctrl support in mcux sai
hakehuang Dec 24, 2021
fc2f1e5
board: pinctrl: board configs in rt1xxx
hakehuang Dec 24, 2021
520a398
dts: binding: rename pinmux to gpr
hakehuang Dec 24, 2021
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43 changes: 43 additions & 0 deletions boards/arm/mimxrt1060_evk/mimxrt1060_evk-pinctrl.dtsi
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Original file line number Diff line number Diff line change
@@ -0,0 +1,43 @@
/*
* Copyright (c) 2022, NXP
* SPDX-License-Identifier: Apache-2.0
*
* Generated by rt_cfg_utils.py on 2022-01-19
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@mbolivar-nordic mbolivar-nordic Feb 17, 2022

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Do you need this line? If it's going into the boards directory like this, I guess it will be maintained by hand from now on; it's not clear why the comment that it was generated is relevant.

*/

#include <nxp/nxp_imx/rt/mimxrt1062-pinctrl.dtsi>

&IOMUXC_GPIO_AD_B0_12_LPUART1_TX {
bias-bus-hold;
input-enable;
};

&IOMUXC_GPIO_AD_B0_13_LPUART1_RX {
bias-bus-hold;
};

&IOMUXC_GPIO_AD_B1_09_SAI1_MCLK {
bias-bus-hold;
input-enable;
};

&IOMUXC_GPIO_AD_B1_12_SAI1_RX_DATA00 {
bias-bus-hold;
input-enable;
};

&IOMUXC_GPIO_AD_B1_13_SAI1_TX_DATA00 {
bias-bus-hold;
input-enable;
};

&IOMUXC_GPIO_AD_B1_14_SAI1_TX_BCLK {
bias-bus-hold;
input-enable;
};

&IOMUXC_GPIO_AD_B1_15_SAI1_TX_SYNC {
bias-bus-hold;
input-enable;
};

17 changes: 17 additions & 0 deletions boards/arm/mimxrt1060_evk/mimxrt1060_evk.dts
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Expand Up @@ -7,6 +7,7 @@
/dts-v1/;

#include <nxp/nxp_rt1060.dtsi>
#include "mimxrt1060_evk-pinctrl.dtsi"

/ {
model = "NXP MIMXRT1060-EVK board";
Expand Down Expand Up @@ -164,6 +165,8 @@ arduino_serial: &lpuart3 {};
&lpuart1 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&IOMUXC_GPIO_AD_B0_12_LPUART1_TX &IOMUXC_GPIO_AD_B0_13_LPUART1_RX>;
pinctrl-names = "default";
};

&enet {
Expand Down Expand Up @@ -218,6 +221,12 @@ zephyr_udc0: &usb1 {

&sai1 {
status = "okay";
pinctrl-0 = <&IOMUXC_GPIO_B0_13_SAI1_MCLK
&IOMUXC_GPIO_AD_B1_12_SAI1_RX_DATA00
&IOMUXC_GPIO_AD_B1_13_SAI1_TX_DATA00
&IOMUXC_GPIO_AD_B1_14_SAI1_TX_BCLK
&IOMUXC_GPIO_AD_B1_15_SAI1_TX_SYNC>;
pinctrl-names = "default";
};

/* Enable GPT for use as a hardware timer. This disables Cortex Systick.
Expand All @@ -226,3 +235,11 @@ zephyr_udc0: &usb1 {
&gpt_hw_timer {
status = "okay";
};

&iomuxcgpr {
status = "okay";
};
Comment on lines +239 to +241
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@gmarull gmarull Jan 14, 2022

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note: if you make CONFIG_PINCTRL=y default, I think DT node should also be defaulted to okay


&pinctrl {
status = "okay";
};
30 changes: 0 additions & 30 deletions boards/arm/mimxrt1060_evk/pinmux.c
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Expand Up @@ -114,22 +114,6 @@ static int mimxrt1060_evk_init(const struct device *dev)
IOMUXC_SetPinMux(IOMUXC_SNVS_WAKEUP_GPIO5_IO00, 0);
#endif

#if DT_NODE_HAS_STATUS(DT_NODELABEL(lpuart1), okay) && CONFIG_SERIAL
/* LPUART1 TX/RX */
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_12_LPUART1_TX, 0);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0);

IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_12_LPUART1_TX,
IOMUXC_SW_PAD_CTL_PAD_PKE_MASK |
IOMUXC_SW_PAD_CTL_PAD_SPEED(2) |
IOMUXC_SW_PAD_CTL_PAD_DSE(6));

IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_13_LPUART1_RX,
IOMUXC_SW_PAD_CTL_PAD_PKE_MASK |
IOMUXC_SW_PAD_CTL_PAD_SPEED(2) |
IOMUXC_SW_PAD_CTL_PAD_DSE(6));
#endif

#if DT_NODE_HAS_STATUS(DT_NODELABEL(lpuart3), okay) && CONFIG_SERIAL
/* LPUART3 TX/RX */
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_06_LPUART3_TX, 0);
Expand Down Expand Up @@ -388,20 +372,6 @@ static int mimxrt1060_evk_init(const struct device *dev)
IOMUXC_SW_PAD_CTL_PAD_DSE(6));
#endif

#if DT_NODE_HAS_STATUS(DT_NODELABEL(sai1), okay) && CONFIG_I2S
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_09_SAI1_MCLK, 1U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_12_SAI1_RX_DATA00, 1U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_13_SAI1_TX_DATA00, 1U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_14_SAI1_TX_BCLK, 1U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_15_SAI1_TX_SYNC, 1U);

IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_09_SAI1_MCLK, 0x10B0u);
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_12_SAI1_RX_DATA00, 0x10B0u);
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_13_SAI1_TX_DATA00, 0x10B0u);
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_14_SAI1_TX_BCLK, 0x10B0u);
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_15_SAI1_TX_SYNC, 0x10B0u);
#endif

return 0;
}

Expand Down