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soc: arm: atmel: Introduce SAMC21x #50384
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Hi @benys and thanks a lot for your contribution. Your PR contains lots of added features in a single commit. In order to make the review easier you will have to split it up a little bit. I suggest to open a dedicated PR for:
Also the commit messages have to follow the guidelines stated here in order to make it through the CI. |
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Hi @martinjaeger it is no problem to split changes. I would like to clarify: No problem for me, but I need wait for HAL approval - becouse many problems with compliation is caused by no HAL files. OK? |
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Yes, looks like a good approach. Whether the SOC and board stuff need to be split further (I've seen some new clock-control bindings, but no driver implementation) would be up to the ATSAM maintainer @nandojve. Please note that we are currently in feature freeze for v3.2 release, so the new additions can only be merged after the release. Assuming the ADC fix is a bug, it could be merged before the release already. |
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@martinjaeger ok I created #50388. |
Sounds good. The main reason for splitting into several PRs, as pointed out by others, is to keep the size of the PR down - but you also need to consider that different features like these are likely to be reviewed by different groups of people. By splitting the PR into logically separate changes you also allow for the PRs to have the reviewers assigned that really care for and know the details of the topic in question. |
Yes, there is this implication. However, we need add a solution that may solve future problems without give us more work. diff --git a/soc/arm/atmel_sam0/Kconfig b/soc/arm/atmel_sam0/Kconfig
index ebda1a5179..a11cf9b95a 100644
--- a/soc/arm/atmel_sam0/Kconfig
+++ b/soc/arm/atmel_sam0/Kconfig
@@ -18,5 +18,6 @@ source "soc/arm/atmel_sam0/common/Kconfig.saml2x"
source "soc/arm/atmel_sam0/common/Kconfig.samd2x"
source "soc/arm/atmel_sam0/common/Kconfig.samd5x"
source "soc/arm/atmel_sam0/*/Kconfig.soc"
+source "soc/arm/atmel_sam0/Kconfig.soc.revisions"
endif
diff --git a/soc/arm/atmel_sam0/Kconfig.soc.revisions b/soc/arm/atmel_sam0/Kconfig.soc.revisions
new file mode 100644
index 0000000000..a152528ac7
--- /dev/null
+++ b/soc/arm/atmel_sam0/Kconfig.soc.revisions
@@ -0,0 +1,10 @@
+# Copyright (c) 2022 Gerson Fernando Budke <[email protected]>
+# SPDX-License-Identifier: Apache-2.0
+
+config SOC_SERIES_REVISION_N
+ bool
+
+config SOC_SERIES_REVISION
+ string
+ default "n" if SOC_SERIES_REVISION_N
+ default ""Add this patch at hal_atmel: diff --git a/asf/sam0/include/CMakeLists.txt b/asf/sam0/include/CMakeLists.txt
index d273adb..77e86df 100644
--- a/asf/sam0/include/CMakeLists.txt
+++ b/asf/sam0/include/CMakeLists.txt
@@ -1 +1 @@
-zephyr_include_directories(${CONFIG_SOC_SERIES})
+zephyr_include_directories(${CONFIG_SOC_SERIES}${CONFIG_SOC_SERIES_REVISION})Then, on your commits you can just add: diff --git a/soc/arm/atmel_sam0/samc21/Kconfig.soc b/soc/arm/atmel_sam0/samc21/Kconfig.soc
index 3f82572539..f3f324abf6 100644
--- a/soc/arm/atmel_sam0/samc21/Kconfig.soc
+++ b/soc/arm/atmel_sam0/samc21/Kconfig.soc
@@ -51,8 +51,10 @@ config SOC_PART_NUMBER_SAMC21J18AU
config SOC_PART_NUMBER_SAMC21N17A
bool "SAMC21N17A"
+ select SOC_SERIES_REVISION_N
config SOC_PART_NUMBER_SAMC21N18A
bool "SAMC21N18A"
+ select SOC_SERIES_REVISION_N
endchoice |
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@nandojve nice solution. I am still learning zephyr philosophy :) I made all changes. (Edit: I hope that I fix lint problems) |
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Hi @benys,
Overall LGTM, a few styles are missing and I would like confirm that flash storage is OK.
When CI is green I will merge hal_atmel. After that, you need replace PR number for the hash.
6fb4e65 to
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I see that PR wit ADC is completed. Maybe I will add devicetrees related with ADC in this PR in my third commit :)? |
Yes, please do it. Make sure that tests are running using twister as I already mentioned for CI side and run a test on board to make sure everything is in place. |
@nandojve twister works fine, only some tests present "test mismatch", but if I check some of them that it present 0 failed. |
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Almost there... : -)
Hal atmel intruduces c20/c21 series support. Signed-off-by: Kamil Serwus <[email protected]>
Some SAM0 contains revisions with separated includes for example SAMC21 and SAMC21N. Signed-off-by: Kamil Serwus <[email protected]> Co-authored-by: Gerson Fernando Budke <[email protected]>
Adds Atmel SAMC20 and SAMC21 soc. C series is based on Cortex-M0+. C21 contains CAN interface. The init routines are same for SAMC20 and SAMC21. They use one clock OSC48M without configuration. The code is inspirated from atmel_sam0/samd21. Signed-off-by: Kamil Serwus <[email protected]>
Add basic support board with SAMC21N soc including SPI, UART, I2C, ADC, Flash, Leds. Signed-off-by: Kamil Serwus <[email protected]>
No problem, I am patient :-) |
At zephyrproject-rtos/hal_atmel#27 I pushed hal for SAM C21
Signed-off-by: Kamil Serwus [email protected]