stm32: Add reinitialization feature for SPI and UART #59200
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knthm
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Thanks for taking a stab at this!
Initial "tires kicking" review. Great work but there are some points I'd like to refine or discuss, specially the integration with PM framework (adding @ceolin to the review for this specific part). Anyway, this goes in the good direction.
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Add bit field values for specifying PM state transition direction, e.g. state entry, exit, or both; use these in place of entering_state bool. Move exising and add new pm_state_notify calls to the exact edges of state transitions, to provide more flexibility and cover more use cases. Signed-off-by: Kenneth J. Miller <[email protected]>
Add pmstates array generated from global power-states DT node children, vs. current per-CPU only pmstates array (SMP platforms only). Add helper functions for retrieving the index of a global/per-CPU power-state array element. These functions are intended to faciliate easier processing of similar PM data structures generated from the same DT power-states nodes. Signed-off-by: Kenneth J. Miller <[email protected]>
Replace individual entry and exit callbacks with a singular callback, with a separate direction bit field to indicate whether the struct applies to state entry/exit, or both. Add a void pointer to provide optional context for the callback. Replace the singular pm_notifiers slist with individual power state- specific slists, generated from DT power-states definitions on SMP, and cpu-power-states on single-CPU platforms. Un/register functions now take a power (sub)state as a parameter, in addition to the usual pm_notifier struct; used to place the notifier into the correct list. Signed-off-by: Kenneth J. Miller <[email protected]>
Update pm tests and sample that make use of pm_notifier functionality, or test system power state transitions. Signed-off-by: Kenneth J. Miller <[email protected]>
This property allows defining one or more power-states phandles in which a peripheral loses its configuration, and must be reinitialized. States below and including S2RAM are inherently assumed to require reinit, this property is intended to cover the exceptions outside of this common use case. It is intended to assist drivers in preventing the SoC from entering these power states during critical code sections, as well as indicate to power management services when a peripheral needs reinitialization. Signed-off-by: Kenneth J. Miller <[email protected]>
Add general purpose of and example use-case of the reinit-power-states property added in this commit series. Signed-off-by: Kenneth J. Miller <[email protected]>
Add helper macros for building a pm_state_info array from a device's reinit-power-states. These macros are intended to assist drivers in and around device reinitializiation. Signed-off-by: Kenneth J. Miller <[email protected]>
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The added reinitialization function helps PM logic restore peripheral functionality when clock context and register contents are lost in certain low-power modes. Signed-off-by: Kenneth J. Miller <[email protected]>
Refactor to prevent code duplication in the driver reinitialization functionality following this commit. Move HAL include statement from driver source to header to make header self-contained. Signed-off-by: Kenneth J. Miller <[email protected]>
The added reinitialization feature helps PM logic restore bus functionality when clock context is lost in certain low-power modes. Signed-off-by: Kenneth J. Miller <[email protected]>
Enable STOP2 reinitialization for affected USART and SPI peripheral instances, as these will otherwise be INOP when the SoC returns from STOP2 low-power mode. Signed-off-by: Kenneth J. Miller <[email protected]>
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This PR adds device reinitialization for SPI and UART, as these will lose their hardware configuration when certain SoC series enter certain STOP/Standby modes.
Unfortunately, I've had to remove ADC and I2C reinit from this PR, as they require deeper PM work, seeing how they need to block during reinit process.
Depends on commits from PRs
st,reinit-power-statesDT property #60369References
See RM0461, chapter 5.4 - Low-Power Modes, Table 37, and chapter 5.4.9 - Stop 2 Mode: